diff options
author | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-06-27 21:31:46 +0000 |
commit | 8bde7f776c77b343aca29b8c7b58464d915ac245 (patch) | |
tree | 20f1fd99975215e7c658454a15cdb4ed4694e2d4 /board/purple | |
parent | 993cad9364c6b87ae429d1ed1130d8153f6f027e (diff) |
* Code cleanup:LABEL_2003_06_27_2340
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
Diffstat (limited to 'board/purple')
-rw-r--r-- | board/purple/Makefile | 3 | ||||
-rw-r--r-- | board/purple/flash.c | 168 | ||||
-rw-r--r-- | board/purple/memsetup.S | 1 | ||||
-rw-r--r-- | board/purple/purple.c | 8 | ||||
-rw-r--r-- | board/purple/u-boot.lds | 20 |
5 files changed, 102 insertions, 98 deletions
diff --git a/board/purple/Makefile b/board/purple/Makefile index d1b00563bf7..a9463b62157 100644 --- a/board/purple/Makefile +++ b/board/purple/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2003 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -29,7 +30,7 @@ OBJS = $(BOARD).o flash.o sconsole.o SOBJS = memsetup.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/purple/flash.c b/board/purple/flash.c index 34f1b91c400..7522580808d 100644 --- a/board/purple/flash.c +++ b/board/purple/flash.c @@ -42,7 +42,7 @@ typedef volatile unsigned long FLASH_PORT_WIDTHV; #define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555) #define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa) -#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) +#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) #define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555) #define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa) #define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555) @@ -60,7 +60,7 @@ typedef volatile unsigned long FLASH_PORT_WIDTHV; #define FLASH29_CMD_CHIP_ERASE 0x80808080 #define FLASH29_CMD_READ_RESET 0xf0f0f0f0 #define FLASH29_CMD_AUTOSELECT 0x90909090 -#define FLASH29_CMD_READ 0x70707070 +#define FLASH29_CMD_READ 0x70707070 #define IN_RAM_CMD_READ 0x1 #define IN_RAM_CMD_WRITE 0x2 @@ -88,43 +88,43 @@ static ulong in_ram_cmd = 0; * can be relocated to scratch ram */ static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) -{ +{ int i,j; - FPW temp,temp1; + FPW temp,temp1; FPWV *str; str = (FPWV *)string; j= strLen/4; - + if(cmd == FLASH29_CMD_AUTOSELECT) { - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; - } - - if(cmd == FLASH29_CMD_READ) - { - i = 0; - while(i<j) - { + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; + } + + if(cmd == FLASH29_CMD_READ) + { + i = 0; + while(i<j) + { temp = *pFA++; temp1 = *(int *)0xa0000000; - *(int *)0xbf0081f8 = temp1 + temp; + *(int *)0xbf0081f8 = temp1 + temp; *str++ = temp; i++; - } - } - - if(cmd == FLASH29_CMD_READ_RESET) - { - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; - } - - *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ + } + } + + if(cmd == FLASH29_CMD_READ_RESET) + { + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; + } + + *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ } /****************************************************************************** @@ -134,38 +134,38 @@ static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) * can be relocated to scratch ram */ static void flash_write_cmd(int cmd, FPWV * pFA, FPW value) -{ - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; +{ + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; if (cmd == FLASH29_CMD_SECTOR) { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; - *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; - *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; - *pFA = FLASH29_CMD_SECTOR; - } - - if (cmd == FLASH29_CMD_SIXTH) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; - *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; - *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; - *(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; + *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; + *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; + *pFA = FLASH29_CMD_SECTOR; + } + + if (cmd == FLASH29_CMD_SIXTH) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_CHIP_ERASE; + *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH; + *(FLASH29_REG_FIFTH_CYCLE) = FLASH29_CMD_FIFTH; + *(FLASH29_REG_SIXTH_CYCLE) = FLASH29_CMD_SIXTH; } - if (cmd == FLASH29_CMD_PROGRAM) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM; + if (cmd == FLASH29_CMD_PROGRAM) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_PROGRAM; *pFA = value; - } - - if (cmd == FLASH29_CMD_READ_RESET) - { - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; - } - - *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ + } + + if (cmd == FLASH29_CMD_READ_RESET) + { + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_READ_RESET; + } + + *(int *)0xbf0081f8 = *(int *)0xa0000000; /* dummy read switch back to sdram interface */ } static void load_cmd(ulong cmd) @@ -174,9 +174,9 @@ static void load_cmd(ulong cmd) ulong *dst; FUNCPTR_CP absEntry; ulong func; - + if (in_ram_cmd & cmd) return; - + if (cmd == IN_RAM_CMD_READ) { func = (ulong)flash_read_cmd; @@ -186,12 +186,12 @@ static void load_cmd(ulong cmd) func = (ulong)flash_write_cmd; } - src = (ulong *)(func & 0xfffffff8); - dst = (ulong *)0xbf008000; - absEntry = (FUNCPTR_CP)(0xbf0081d0); - absEntry(src,dst,0x38); + src = (ulong *)(func & 0xfffffff8); + dst = (ulong *)0xbf008000; + absEntry = (FUNCPTR_CP)(0xbf0081d0); + absEntry(src,dst,0x38); - in_ram_cmd = cmd; + in_ram_cmd = cmd; } /*----------------------------------------------------------------------- @@ -203,14 +203,14 @@ unsigned long flash_init (void) { unsigned long size = 0; int i; - - load_cmd(IN_RAM_CMD_READ); + + load_cmd(IN_RAM_CMD_READ); /* Init: no FLASHes known */ for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) { ulong flashbase = PHYS_FLASH_1; ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0; - + /* Disable write protection */ *buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS; @@ -218,14 +218,14 @@ unsigned long flash_init (void) memset(&flash_info[i], 0, sizeof(flash_info_t)); #endif - flash_info[i].size = + flash_info[i].size = flash_get_size((FPW *)flashbase, &flash_info[i]); if (flash_info[i].flash_id == FLASH_UNKNOWN) { printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", i, flash_info[i].size); } - + size += flash_info[i].size; } @@ -281,13 +281,13 @@ static flash_info_t *flash_get_info(ulong base) { int i; flash_info_t * info; - + for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->start[0] <= base && base < info->start[0] + info->size) break; } - + return i == CFG_MAX_FLASH_BANKS ? 0 : info; } @@ -334,32 +334,32 @@ void flash_print_info (flash_info_t *info) case FLASH_AM160B: fmt = "29LV160B%s (16 Mbit, %s)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: @@ -401,16 +401,16 @@ void flash_print_info (flash_info_t *info) ulong flash_get_size (FPWV *addr, flash_info_t *info) { FUNCPTR_RD absEntry; - FPW retValue; + FPW retValue; int flag; - load_cmd(IN_RAM_CMD_READ); + load_cmd(IN_RAM_CMD_READ); absEntry = (FUNCPTR_RD)FLASH_READ_CMD; flag = disable_interrupts(); absEntry(FLASH29_CMD_AUTOSELECT,0,0,0); if (flag) enable_interrupts(); - + udelay(100); flag = disable_interrupts(); @@ -451,7 +451,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) int rcode = 0; FUNCPTR_WR absEntry; - load_cmd(IN_RAM_CMD_WRITE); + load_cmd(IN_RAM_CMD_WRITE); absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; if ((s_first < 0) || (s_first > s_last)) { @@ -543,15 +543,15 @@ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) left > 0 && res == 0; addr += sizeof(data), left -= sizeof(data) - bytes) { - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); /* combine source and destination data so can program * an entire word of 16 or 32 bits */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) data += *((uchar *)addr + i); else data += *src++; diff --git a/board/purple/memsetup.S b/board/purple/memsetup.S index 9c983c9a556..d532ceba827 100644 --- a/board/purple/memsetup.S +++ b/board/purple/memsetup.S @@ -35,4 +35,3 @@ memsetup: sw t1, 0(t0) j ra nop - diff --git a/board/purple/purple.c b/board/purple/purple.c index b1eb78f0e60..4c3e5b44b53 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -35,7 +35,7 @@ __asm__ __volatile__(" \ .set noreorder; \ .set mips3; \ - cache %1, (%0); \ + cache %1, (%0); \ .set mips0; \ .set reorder" \ : \ @@ -182,7 +182,7 @@ static void copydwords (ulong *source, ulong *destination, ulong nlongs) *(ulong *)0xbf0081f8 = temp1 + temp; *destination++ = temp; - } + } } /******************************************************************************* @@ -214,8 +214,8 @@ static void programLoad(void) src = (ulong *)(TEXT_BASE + 0x428); dst = (ulong *)0xbf0081d0; - absEntry = (FUNCPTR)(TEXT_BASE + 0x400); - absEntry(src,dst,0x6); + absEntry = (FUNCPTR)(TEXT_BASE + 0x400); + absEntry(src,dst,0x6); src = (ulong *)((ulong)copydwords & 0xfffffff8); dst = (ulong *)0xbf008000; diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 75088654525..270fbe8afca 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -29,9 +29,9 @@ OUTPUT_ARCH(mips) ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/mips/start.o (.text) @@ -47,11 +47,11 @@ SECTIONS *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } . = ALIGN(4); .sdata : { *(.sdata) } @@ -64,11 +64,15 @@ SECTIONS .sdata : { *(.sdata) } + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + uboot_end_data = .; num_got_entries = (__got_end - __got_start) >> 2; - . = ALIGN(4); + . = ALIGN(4); .sbss : { *(.sbss) } - .bss : { *(.bss) } + .bss : { *(.bss) } uboot_end = .; } |