diff options
| author | Wills Wang <wills.wang@live.com> | 2016-03-16 17:00:00 +0800 |
|---|---|---|
| committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2016-05-21 01:25:50 +0200 |
| commit | a2277cc30cdb40298aca80344f3764db6a0cfb8d (patch) | |
| tree | 923d5a68add3d518461c0826c6543d6e7c33d574 /board/qca | |
| parent | 6a7b52bc8d30090633d098f9e988276beb7a53d5 (diff) | |
mips: ath79: add AP143 reference board
This patch add board-level code and base DT for AP143.
Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'board/qca')
| -rw-r--r-- | board/qca/ap143/Kconfig | 12 | ||||
| -rw-r--r-- | board/qca/ap143/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/qca/ap143/Makefile | 5 | ||||
| -rw-r--r-- | board/qca/ap143/ap143.c | 66 |
4 files changed, 89 insertions, 0 deletions
diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig new file mode 100644 index 00000000000..4cdac0d06d0 --- /dev/null +++ b/board/qca/ap143/Kconfig @@ -0,0 +1,12 @@ +if TARGET_AP143 + +config SYS_VENDOR + default "qca" + +config SYS_BOARD + default "ap143" + +config SYS_CONFIG_NAME + default "ap143" + +endif diff --git a/board/qca/ap143/MAINTAINERS b/board/qca/ap143/MAINTAINERS new file mode 100644 index 00000000000..11cb14fc74d --- /dev/null +++ b/board/qca/ap143/MAINTAINERS @@ -0,0 +1,6 @@ +AP143 BOARD +M: Wills Wang <wills.wang@live.com> +S: Maintained +F: board/qca/ap143/ +F: include/configs/ap143.h +F: configs/ap143_defconfig diff --git a/board/qca/ap143/Makefile b/board/qca/ap143/Makefile new file mode 100644 index 00000000000..00f78376ec5 --- /dev/null +++ b/board/qca/ap143/Makefile @@ -0,0 +1,5 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y = ap143.o diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c new file mode 100644 index 00000000000..1572472ca30 --- /dev/null +++ b/board/qca/ap143/ap143.c @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/addrspace.h> +#include <asm/types.h> +#include <mach/ar71xx_regs.h> +#include <mach/ddr.h> +#include <debug_uart.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + void __iomem *regs; + u32 val; + + regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, + MAP_NOCACHE); + + /* + * GPIO9 as input, GPIO10 as output + */ + val = readl(regs + AR71XX_GPIO_REG_OE); + val |= QCA953X_GPIO(9); + val &= ~QCA953X_GPIO(10); + writel(val, regs + AR71XX_GPIO_REG_OE); + + /* + * Enable GPIO10 as UART0_SOUT + */ + val = readl(regs + QCA953X_GPIO_REG_OUT_FUNC2); + val &= ~QCA953X_GPIO_MUX_MASK(16); + val |= QCA953X_GPIO_OUT_MUX_UART0_SOUT << 16; + writel(val, regs + QCA953X_GPIO_REG_OUT_FUNC2); + + /* + * Enable GPIO9 as UART0_SIN + */ + val = readl(regs + QCA953X_GPIO_REG_IN_ENABLE0); + val &= ~QCA953X_GPIO_MUX_MASK(8); + val |= QCA953X_GPIO_IN_MUX_UART0_SIN << 8; + writel(val, regs + QCA953X_GPIO_REG_IN_ENABLE0); + + /* + * Enable GPIO10 output + */ + val = readl(regs + AR71XX_GPIO_REG_OUT); + val |= QCA953X_GPIO(10); + writel(val, regs + AR71XX_GPIO_REG_OUT); +} +#endif + +int board_early_init_f(void) +{ +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + ddr_init(); + return 0; +} |