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authorVlad Lungu <vlad@comsys.ro>2008-01-16 19:27:51 +0200
committerShinya Kuribayashi <skuribay@ruby.dti.ne.jp>2008-01-17 08:28:08 +0900
commit0764c164fed6277d359cf132d55187ea34290114 (patch)
treef6862e709f1ce4f12a0e5dd0cf9746fa5f7d88c7 /board/qemu-mips/qemu-mips.c
parent4c9e98ace78e7de972adf7da7135a46ec0a4ee7e (diff)
MIPS:Target support for qemu -M mips
With serial, NE2000, IDE support. Tested in big-endian mode. Memory size hard-coded to 128M for now, so don't play with the -m option. Signed-off-by: Vlad Lungu <vlad@comsys.ro>
Diffstat (limited to 'board/qemu-mips/qemu-mips.c')
-rw-r--r--board/qemu-mips/qemu-mips.c89
1 files changed, 89 insertions, 0 deletions
diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
new file mode 100644
index 0000000000..a6ad7b9ab3
--- /dev/null
+++ b/board/qemu-mips/qemu-mips.c
@@ -0,0 +1,89 @@
+/*
+ * (C) Copyright 2007
+ * Vlad Lungu vlad@comsys.ro
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/mipsregs.h>
+#include <asm/io.h>
+
+long int initdram(int board_type)
+{
+ /* Sdram is setup by assembler code */
+ /* If memory could be changed, we should return the true value here */
+ return MEM_SIZE*1024*1024;
+}
+
+int checkboard(void)
+{
+ u32 proc_id;
+ u32 config1;
+
+ proc_id = read_32bit_cp0_register(CP0_PRID);
+ printf("Board: Qemu -M mips CPU: ");
+ switch (proc_id) {
+ case 0x00018000:
+ printf("4Kc");
+ break;
+ case 0x00018400:
+ printf("4KEcR1");
+ break;
+ case 0x00019000:
+ printf("4KEc");
+ break;
+ case 0x00019300:
+ config1 = read_mips32_cp0_config1();
+ if (config1 & 1)
+ printf("24Kf");
+ else
+ printf("24Kc");
+ break;
+ case 0x00019500:
+ printf("34Kf");
+ break;
+ case 0x00000400:
+ printf("R4000");
+ break;
+ case 0x00018100:
+ config1 = read_mips32_cp0_config1();
+ if (config1 & 1)
+ printf("5Kf");
+ else
+ printf("5Kc");
+ break;
+ case 0x000182a0:
+ printf("20Kc");
+ break;
+
+ default:
+ printf("unknown");
+ }
+ printf(" proc_id=0x%x\n", proc_id);
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ set_io_port_base(0);
+ return 0;
+}