summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
authorSimon Glass <sjg@chromium.org>2011-12-19 15:40:58 -0800
committerGerrit <chrome-bot@google.com>2011-12-21 13:16:25 -0800
commit5e601c69d07857ebfbd709acba7c448fd0189f5f (patch)
tree89d6c42c51009a720f5284e4bc2bbe13a84b7678 /board
parentfe623bdec87124735ae59fce52aea05782f688ca (diff)
tegra: Refactor serial init code
Move the serial init code into its own function to collect this all in one place. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: I70162d836fddfabedd9cfbc07d8f0dc920602af8 Reviewed-on: https://gerrit.chromium.org/gerrit/13204 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board')
-rw-r--r--board/nvidia/common/board.c68
1 files changed, 31 insertions, 37 deletions
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index a1060b54af5..e772b3723cd 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -217,11 +217,8 @@ static void pin_mux_mmc(void)
* Routine: pinmux_init
* Description: Do individual peripheral pinmux configs
*/
-static void pinmux_init(int uart_ids)
+static void pinmux_init(void)
{
-#if defined(CONFIG_TEGRA2)
- pin_mux_uart(uart_ids);
-#endif
pin_mux_switches();
#if defined(CONFIG_TEGRA3)
@@ -233,13 +230,34 @@ static void pinmux_init(int uart_ids)
#endif
}
-/**
- * Do individual peripheral GPIO configs
- *
- * @param blob FDT blob with configuration information
- */
-static void gpio_init(const void *blob)
+static void init_uarts(const void *blob)
{
+ int uart_ids = 0; /* bit mask of which UART ids to enable */
+#ifdef CONFIG_OF_CONTROL
+ struct fdt_uart uart;
+
+ if (!fdt_decode_uart_console(blob, &uart, gd->baudrate))
+ uart_ids = 1 << uart.id;
+#else
+#ifdef CONFIG_TEGRA2_ENABLE_UARTA
+ uart_ids |= UARTA;
+#endif
+#ifdef CONFIG_TEGRA2_ENABLE_UARTB
+ uart_ids |= UARTB;
+#endif
+#ifdef CONFIG_TEGRA2_ENABLE_UARTD
+ uart_ids |= UARTD;
+#endif
+#endif /* CONFIG_OF_CONTROL */
+ /* Initialize UART clocks */
+ clock_init_uart(uart_ids);
+
+ /* Initialize periph pinmuxes */
+#if defined(CONFIG_TEGRA2)
+ pin_mux_uart(uart_ids);
+#endif
+
+ /* Initialize periph GPIOs */
#ifdef CONFIG_SPI_UART_SWITCH
gpio_early_init_uart(blob);
#endif
@@ -346,40 +364,16 @@ int board_init(void)
int board_early_init_f(void)
{
- int uart_ids = 0; /* bit mask of which UART ids to enable */
ulong pllp_rate = 216000000; /* default PLLP clock rate */
-#ifdef CONFIG_OF_CONTROL
- struct fdt_uart uart;
-
- if (!fdt_decode_uart_console(gd->blob, &uart, gd->baudrate))
- uart_ids = 1 << uart.id;
-#else
-#ifdef CONFIG_TEGRA2_ENABLE_UARTA
- uart_ids |= UARTA;
-#endif
-#ifdef CONFIG_TEGRA2_ENABLE_UARTB
- uart_ids |= UARTB;
-#endif
-#ifdef CONFIG_TEGRA2_ENABLE_UARTD
- uart_ids |= UARTD;
-#endif
-#endif /* CONFIG_OF_CONTROL */
-
/* Initialize essential common plls */
#ifdef CONFIG_OF_CONTROL
pllp_rate = fdt_decode_clock_rate(gd->blob, "pllp", pllp_rate);
#endif
clock_early_init(pllp_rate);
- /* Initialize UART clocks */
- clock_init_uart(uart_ids);
-
- /* Initialize periph pinmuxes */
- pinmux_init(uart_ids);
-
- /* Initialize periph GPIOs */
- gpio_init(gd->blob);
+ pinmux_init();
+ init_uarts(gd->blob);
#ifdef CONFIG_VIDEO_TEGRA2
/* Get LCD panel size */
@@ -438,7 +432,7 @@ static void send_output_with_pllp(ulong pllp_rate, const char *str)
pin_mux_uart(uart_ids);
#ifdef CONFIG_TEGRA3
/* Until we sort out pinmux, we must do the global Tegra3 init */
- pinmux_init(uart_ids);
+ pinmux_init();
#endif
/*