Add omapl137 support1.3.3-omapl137-evm-200906171409

13 files changed, 528 insertions, 58 deletions

diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
index eedde597b81..891b4d92498 100644
--- a/board/amcc/taihu/taihu.c
+++ b/board/amcc/taihu/taihu.c
@@ -165,16 +165,20 @@ unsigned char spi_read(void)
 	return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
 }
 
-void taihu_spi_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-	gpio_write_bit(SPI_CS_GPIO0, cs);
+	return bus == 0 && cs == 0;
 }
 
-spi_chipsel_type spi_chipsel[]= {
-	taihu_spi_chipsel
-};
+void spi_cs_activate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 1);
+}
 
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	gpio_write_bit(SPI_CS_GPIO0, 0);
+}
 
 #ifdef CONFIG_PCI
 static unsigned char int_lines[32] = {
diff --git a/board/bf533-ezkit/.gitignore b/board/bf533-ezkit/.gitignore
index 945f3245496..e69de29bb2d 100644
--- a/board/bf533-ezkit/.gitignore
+++ b/board/bf533-ezkit/.gitignore
@@ -1 +0,0 @@
-/u-boot.lds
diff --git a/board/bf533-stamp/.gitignore b/board/bf533-stamp/.gitignore
index 945f3245496..e69de29bb2d 100644
--- a/board/bf533-stamp/.gitignore
+++ b/board/bf533-stamp/.gitignore
@@ -1 +0,0 @@
-/u-boot.lds
diff --git a/board/bf537-stamp/.gitignore b/board/bf537-stamp/.gitignore
index 945f3245496..e69de29bb2d 100644
--- a/board/bf537-stamp/.gitignore
+++ b/board/bf537-stamp/.gitignore
@@ -1 +0,0 @@
-/u-boot.lds
diff --git a/board/bf561-ezkit/.gitignore b/board/bf561-ezkit/.gitignore
index 945f3245496..e69de29bb2d 100644
--- a/board/bf561-ezkit/.gitignore
+++ b/board/bf561-ezkit/.gitignore
@@ -1 +0,0 @@
-/u-boot.lds
diff --git a/board/da8xx/da8xx-evm/Makefile b/board/da8xx/da8xx-evm/Makefile
new file mode 100644
index 00000000000..fa0013811d4
--- /dev/null
+++ b/board/da8xx/da8xx-evm/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= dv_board.o
+SOBJS	:= board_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/da8xx/da8xx-evm/board_init.S b/board/da8xx/da8xx-evm/board_init.S
new file mode 100644
index 00000000000..22d8adc18ca
--- /dev/null
+++ b/board/da8xx/da8xx-evm/board_init.S
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl	dv_board_init
+dv_board_init:
+
+	mov	pc, lr
diff --git a/board/da8xx/da8xx-evm/config.mk b/board/da8xx/da8xx-evm/config.mk
new file mode 100644
index 00000000000..56de37a08fb
--- /dev/null
+++ b/board/da8xx/da8xx-evm/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2003
+# Texas Instruments, <www.ti.com>
+# Swaminathan <swami.iyer@ti.com>
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# (C) Copyright 2008
+# Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com>
+#
+# Texas Instruments DA8xx EVM board (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# DA8xx EVM has 1 bank of 64 MB SDRAM (2 16Meg x16 chips).
+# Physical Address:
+# C000'0000 to C400'0000
+#
+# Linux-Kernel is expected to be at C000'8000, entry C000'8000
+# (mem base + reserved)
+#
+# we load ourself to C108 '0000
+#
+#
+
+#Provide at least 16MB spacing between us and the Linux Kernel image
+TEXT_BASE = 0xC1080000
diff --git a/board/da8xx/da8xx-evm/dv_board.c b/board/da8xx/da8xx-evm/dv_board.c
new file mode 100644
index 00000000000..481e1de7520
--- /dev/null
+++ b/board/da8xx/da8xx-evm/dv_board.c
@@ -0,0 +1,316 @@
+/*
+ * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc.  <nsekhar@ti.com>
+ * 
+ * Modified for DA8xx EVM. 
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+#include <asm/io.h>
+
+#define MACH_TYPE_DA8XX_EVM		1781
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void	timer_init(void);
+extern int	eth_hw_init(void);
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+	dv_reg_p	mdstat, mdctl, ptstat, ptcmd;
+
+	if (id >= 64)
+		return;	
+
+    if(id < 32) {
+	mdstat = REG_P(PSC0_MDSTAT + (id * 4));
+        mdctl = REG_P(PSC0_MDCTL + (id * 4));
+        ptstat = REG_P(PSC0_PTSTAT);
+        ptcmd = REG_P(PSC0_PTCMD);
+    } else {
+        id -= 32;
+	    mdstat = REG_P(PSC1_MDSTAT + (id * 4));
+        mdctl = REG_P(PSC1_MDCTL + (id * 4));
+        ptstat = REG_P(PSC1_PTSTAT);
+        ptcmd = REG_P(PSC1_PTCMD);
+    }
+    
+	while (*ptstat & 0x01) {;}
+
+	if ((*mdstat & 0x1f) == 0x03)
+		return;			/* Already on and enabled */
+
+	*mdctl |= 0x03;
+
+	/* Special treatment for some modules as for sprue14 p.7.4.2 */
+    /* TBD: Confirm if such cases exist for Primus */
+	if (0)
+	   	*mdctl |= 0x200;
+
+	*ptcmd = 0x01;
+
+	while (*ptstat & 0x01) {;}
+	while ((*mdstat & 0x1f) != 0x03) {;}	/* Probably an overkill... */
+}
+
+int board_init(void)
+{
+
+	dv_reg_p intc;		
+
+	/*-------------------------------------------------------*
+	 * Mask all IRQs by clearing the global enable and setting
+     * the enable clear for all the 90 interrupts. This code is
+	 * also included in low level init. Including it here in case
+	 * low level init is skipped. Not removing it from low level
+	 * init in case some of the low level init code generates 
+	 * interrupts... Not expected... but you never know...
+	 *-------------------------------------------------------*/
+		
+#ifndef CONFIG_USE_IRQ
+	intc = REG_P(INTC_GLB_EN);
+	intc[0] = 0;	
+
+	intc = REG_P(INTC_HINT_EN);
+	intc[0] = 0;
+	intc[1] = 0;
+	intc[2] = 0;			
+
+	intc = REG_P(INTC_EN_CLR0);
+	intc[0] = 0xFFFFFFFF;
+	intc[1] = 0xFFFFFFFF;
+	intc[2] = 0xFFFFFFFF;
+#endif
+
+	/* arch number of the board */
+	gd->bd->bi_arch_number = MACH_TYPE_DA8XX_EVM;
+
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+	/* Power on required peripherals 
+	 * ARM does not have acess by default to PSC0 and PSC1
+	 * assuming here that the DSP bootloader has set the IOPU
+	 * such that PSC access is available to ARM
+	 */
+	lpsc_on(DAVINCI_LPSC_AEMIF);    /* NAND, NOR */
+	lpsc_on(DAVINCI_LPSC_SPI0);     /* Serial Flash */
+	lpsc_on(DAVINCI_LPSC_EMAC);     /* image download */
+	lpsc_on(DAVINCI_LPSC_UART2);    /* console */
+	lpsc_on(DAVINCI_LPSC_GPIO);
+
+	/* Pin Muxing support */
+	
+	/* write the kick registers to unlock the PINMUX registers */
+	REG(KICK0) = 0x83e70b13;  /* Kick0 unlock */
+	REG(KICK1) = 0x95a4f1e0;  /* Kick1 unlock */
+
+	/* setup the SUSPSRC for ARM to control emulation suspend */
+	REG(SUSPSRC) &= ~( (1 << 27) 	/* Timer0 */
+			| (1 << 21) 	/* SPI0 */
+			| (1 << 20) 	/* UART2 */ 
+			| (1 << 5) 	/* EMAC */
+			| (1 << 16) 	/* I2C0 */
+			);		
+
+#ifdef CONFIG_USE_PINMUX
+
+#ifdef CONFIG_SPI_FLASH
+	/* SPI0 */
+	REG(PINMUX7) &= 0x00000FFF;
+	REG(PINMUX7) |= 0x11111000;
+#endif
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+	/* RMII clock is sourced externally */
+	REG(PINMUX9) &= 0xFF0FFFFF; 
+	REG(PINMUX10) &= 0x0000000F; 
+	REG(PINMUX10) |= 0x22222220; 
+	REG(PINMUX11) &= 0xFFFFFF00; 
+	REG(PINMUX11) |= 0x00000022; 
+#endif
+
+	/* Async EMIF */
+#if defined(CFG_USE_NAND) || defined(CFG_USE_NOR)
+	REG(PINMUX13) &= 0x00FFFFFF;
+	REG(PINMUX13) |= 0x11000000;
+	REG(PINMUX14) =  0x11111111;
+	REG(PINMUX15) =  0x11111111;
+	REG(PINMUX16) =  0x11111111;
+	REG(PINMUX17) =  0x11111111;
+	REG(PINMUX18) =  0x11111111;
+	REG(PINMUX19) &= 0xFFFFFFF0;
+	REG(PINMUX19) |= 0x1;
+#endif
+
+	/* UART Muxing and enabling */
+	REG(PINMUX8) &= 0x0FFFFFFF; 
+	REG(PINMUX8) |= 0x20000000;
+    
+	REG(PINMUX9) &= 0xFFFFFFF0; 
+	REG(PINMUX9) |= 0x00000002;
+
+	/* I2C muxing */
+	REG(PINMUX8) &= 0xFFF00FFF;
+	REG(PINMUX8) |= 0x00022000;
+
+#endif
+
+	/* write the kick registers to lock the PINMUX registers */
+	REG(KICK0) = 0x0;  /* Kick0 lock */
+	REG(KICK1) = 0x0;  /* Kick1 lock */
+
+	REG(DAVINCI_UART2_BASE + 0x30) = 0xE001;
+
+
+	return(0);
+}
+
+int misc_init_r (void)
+{
+	u_int8_t	tmp[20], buf[10];
+	int i;
+
+	printf ("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID));
+
+	/* Set Ethernet MAC address from EEPROM */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
+		printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
+	} else {
+		tmp[0] = 0xff;
+		for (i = 0; i < 6; i++)
+			tmp[0] &= buf[i];
+
+		if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
+			sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
+				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+			setenv("ethaddr", (char *)&tmp[0]);
+		}
+	}
+
+	tmp[0] = 0x01;
+	tmp[1] = 0x23;
+	if(i2c_write(0x5f, 0, 0, tmp, 2)) {
+		printf("Ethernet switch start failed!\n");
+	}
+
+	if (!eth_hw_init()) {
+		printf("Error: Ethernet init failed!\n");
+	}
+
+	return(0);
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return(0);
+}
+
+#if defined(CFG_USE_NOR)
+static u8 nor_read8(void *addr)
+{
+      u32 temp = (u32) addr;
+
+      temp &= 0x00FFFFFF;
+      temp >>= 13;
+      temp |= 0x62000000;
+      *(unsigned char*) temp = 0;
+
+      return __raw_readb(addr);
+}
+
+static u16 nor_read16(void *addr)
+{
+      u32 temp = (u32) addr;
+
+      temp &= 0x00FFFFFF;
+      temp >>= 13;
+      temp |= 0x62000000;
+      *(unsigned char*) temp = 0;
+
+      return __raw_readw(addr);
+}
+
+static u32 nor_read32(void *addr)
+{
+      u32 temp = (u32) addr;
+
+      temp &= 0x00FFFFFF;
+      temp >>= 13;
+      temp |= 0x62000000;
+      *(unsigned char*) temp = 0;
+
+      return __raw_readl(addr);
+}
+
+static void nor_write8(u8 value, void *addr)
+{
+	u32 temp = (u32) addr;
+	temp &= 0x00FFFFFF;
+	temp >>= 13;
+	temp |= 0x62000000;
+	*(unsigned char*) temp = 0;
+	__raw_writeb(value, addr);
+}
+
+static void nor_write16(u8 value, void *addr)
+{
+	u32 temp = (u32) addr;
+	temp &= 0x00FFFFFF;
+	temp >>= 13;
+	temp |= 0x62000000;
+	*(unsigned char*) temp = 0;
+	__raw_writew(value, addr);
+}
+
+static void nor_write32(u8 value, void *addr)
+{
+	u32 temp = (u32) addr;
+	temp &= 0x00FFFFFF;
+	temp >>= 13;
+	temp |= 0x62000000;
+	*(unsigned char*) temp = 0;
+	__raw_writel(value, addr);
+}
+
+void board_flash_set_access(ulong bank_base, int banknum, flash_info_t* info)
+{
+	info->read8 = nor_read8;
+	info->read16 = nor_read16;
+	info->read32 = nor_read32;
+	
+	info->write8 = nor_write8;
+	info->write16 = nor_write16;
+	info->write32 = nor_write32;
+}
+#endif
diff --git a/board/da8xx/da8xx-evm/u-boot.lds b/board/da8xx/da8xx-evm/u-boot.lds
new file mode 100644
index 00000000000..a4fcd1a9bb4
--- /dev/null
+++ b/board/da8xx/da8xx-evm/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+	. = ALIGN(4);
+	.text	:
+	{
+	  cpu/arm926ejs/start.o	(.text)
+	  *(.text)
+	}
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+	. = ALIGN(4);
+	.data : { *(.data) }
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss (NOLOAD) : { *(.bss) }
+	_end = .;
+}
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 6c825969d38..e18e68e8cec 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -257,25 +257,24 @@ void sdram_init(void)
 
 #define SPI_CS_MASK	0x80000000
 
-void spi_eeprom_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
 	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
-	if (cs)
-		iopd->dat &= ~SPI_CS_MASK;
-	else
-		iopd->dat |=  SPI_CS_MASK;
+	iopd->dat &= ~SPI_CS_MASK;
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_eeprom_chipsel,
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0];
 
+	iopd->dat |=  SPI_CS_MASK;
+}
 #endif /* CONFIG_HARD_SPI */
 
 #if defined(CONFIG_OF_BOARD_SETUP)
diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c
index 25209e05464..e85a0fc4dbe 100644
--- a/board/sacsng/sacsng.c
+++ b/board/sacsng/sacsng.c
@@ -842,37 +842,30 @@ void show_boot_progress (int status)
 #define SPI_ADC_CS_MASK	0x00000800
 #define SPI_DAC_CS_MASK	0x00001000
 
-void spi_adc_chipsel(int cs)
+static const u32 cs_mask[] = {
+    SPI_ADC_CS_MASK,
+    SPI_DAC_CS_MASK,
+};
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+    return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]);
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_ADC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_ADC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat &= ~cs_mask[slave->cs];
 }
 
-void spi_dac_chipsel(int cs)
+void spi_cs_deactivate(struct spi_slave *slave)
 {
     volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */);
 
-    if(cs)
-	iopd->pdat &= ~SPI_DAC_CS_MASK;	/* activate the chip select */
-    else
-	iopd->pdat |=  SPI_DAC_CS_MASK;	/* deactivate the chip select */
+    iopd->pdat |= cs_mask[slave->cs];
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_adc_chipsel,
-	spi_dac_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-
 #endif
 
 #endif /* CONFIG_MISC_INIT_R */
diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c
index 2ec3a728d74..3ee8ba588dc 100644
--- a/board/ssv/adnpesc1/adnpesc1.c
+++ b/board/ssv/adnpesc1/adnpesc1.c
@@ -69,25 +69,24 @@ long int initdram (int board_type)
 
 #define	SPI_RTC_CS_MASK	0x00000001
 
-void spi_rtc_chipsel(int cs)
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
 {
 	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
 
-	if (cs)
-		spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
-	else
-		spi->slaveselect = 0;			/* deactivate (0) */
+	spi->slaveselect = SPI_RTC_CS_MASK;	/* activate (1) */
 }
 
-/*
- * The SPI command uses this table of functions for controlling the SPI
- * chip selects: it calls the appropriate function to control the SPI
- * chip selects.
- */
-spi_chipsel_type spi_chipsel[] = {
-	spi_rtc_chipsel
-};
-int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE;
+
+	spi->slaveselect = 0;			/* deactivate (0) */
+}
 
 #endif