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authorTom Rini <trini@ti.com>2013-10-04 13:17:48 -0400
committerTom Rini <trini@ti.com>2013-10-04 13:17:48 -0400
commitf835c77fb7e57508ffe8d8ca3a092ee28add77b2 (patch)
treec3cecbfc7fa6adc834c6d2a365bb4e571a388b49 /board
parent0c5274e6f3231a3a28dafc1204b3f71a3534c520 (diff)
parente261c83aa04ce0396d57aaecf8dfe0970ffac03e (diff)
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'board')
-rw-r--r--board/armltd/vexpress/vexpress_common.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index 4c7a7f46d59..56febd95251 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -256,3 +256,18 @@ ulong get_tbclk(void)
{
return (ulong)CONFIG_SYS_HZ;
}
+
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+/* Setting the address at which secondary cores start from.
+ * Versatile Express uses one address for all cores, so ignore corenr
+ */
+void smp_set_core_boot_addr(unsigned long addr, int corenr)
+{
+ /* The SYSFLAGS register on VExpress needs to be cleared first
+ * by writing to the next address, since any writes to the address
+ * at offset 0 will only be ORed in
+ */
+ writel(~0, CONFIG_SYSFLAGS_ADDR + 4);
+ writel(addr, CONFIG_SYSFLAGS_ADDR);
+}
+#endif