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authorTom Rini <trini@konsulko.com>2025-05-21 08:59:10 -0600
committerTom Rini <trini@konsulko.com>2025-05-21 09:00:21 -0600
commit8f85a7345ed5df70a155f0630da72970eb01d87a (patch)
tree10acf511e4f955f5874d9e64331c841609b4804a /common/board_r.c
parent0a87352281ade2b822ce0360e1f105f6e43a96e1 (diff)
parentff6e20c32ff33c6963f7d0a79a0914681461f4fa (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26259 - Initial SPL support for T-Head TH1520 SoC - Improve usability of TH1520 with mainline SPL - Support building RV32 & RV64 images - riscv: Improve jh7110 support
Diffstat (limited to 'common/board_r.c')
-rw-r--r--common/board_r.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/common/board_r.c b/common/board_r.c
index b90a4d9ff69..41c8dec8d49 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -815,7 +815,9 @@ void board_init_r(gd_t *new_gd, ulong dest_addr)
if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP))
arch_setup_gd(new_gd);
-#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
+#if defined(CONFIG_RISCV)
+ set_gd(new_gd);
+#elif !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
gd = new_gd;
#endif
gd->flags &= ~GD_FLG_LOG_READY;