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authorStefan Roese <sr@denx.de>2009-09-24 09:55:50 +0200
committerStefan Roese <sr@denx.de>2009-09-28 10:45:42 +0200
commit952e7760bfc5b0e3b142b9ce34e7fbb7d008c900 (patch)
treeabd867c1a44dbc20bbd970c36c76f0355adc6df4 /common/cmd_reginfo.c
parent984f10baac8ef6032df52f135943d6b0bc96f724 (diff)
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case
The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'common/cmd_reginfo.c')
-rw-r--r--common/cmd_reginfo.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c
index 3ed15092ae9..5e29ff3bcd7 100644
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -93,17 +93,17 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#elif defined (CONFIG_405GP)
printf ("\n405GP registers; MSR=%08x\n",mfmsr());
printf ("\nUniversal Interrupt Controller Regs\n"
- "uicsr uicer uiccr uicpr uictr uicmsr uicvr uicvcr"
+ "UIC0SR UIC0ER UIC0CR UIC0PR UIC0TR UIC0MSR UIC0VR UIC0VCR"
"\n"
"%08x %08x %08x %08x %08x %08x %08x %08x\n",
- mfdcr(uicsr),
- mfdcr(uicer),
- mfdcr(uiccr),
- mfdcr(uicpr),
- mfdcr(uictr),
- mfdcr(uicmsr),
- mfdcr(uicvr),
- mfdcr(uicvcr));
+ mfdcr(UIC0SR),
+ mfdcr(UIC0ER),
+ mfdcr(UIC0CR),
+ mfdcr(UIC0PR),
+ mfdcr(UIC0TR),
+ mfdcr(UIC0MSR),
+ mfdcr(UIC0VR),
+ mfdcr(UIC0VCR));
puts ("\nMemory (SDRAM) Configuration\n"
"besra besrsa besrb besrsb bear mcopt1 rtr pmit\n");
@@ -180,17 +180,17 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#elif defined(CONFIG_405EP)
printf ("\n405EP registers; MSR=%08x\n",mfmsr());
printf ("\nUniversal Interrupt Controller Regs\n"
- "uicsr uicer uiccr uicpr uictr uicmsr uicvr uicvcr"
+ "UIC0SR UIC0ER UIC0CR UIC0PR UIC0TR UIC0MSR UIC0VR UIC0VCR"
"\n"
"%08x %08x %08x %08x %08x %08x %08x %08x\n",
- mfdcr(uicsr),
- mfdcr(uicer),
- mfdcr(uiccr),
- mfdcr(uicpr),
- mfdcr(uictr),
- mfdcr(uicmsr),
- mfdcr(uicvr),
- mfdcr(uicvcr));
+ mfdcr(UIC0SR),
+ mfdcr(UIC0ER),
+ mfdcr(UIC0CR),
+ mfdcr(UIC0PR),
+ mfdcr(UIC0TR),
+ mfdcr(UIC0MSR),
+ mfdcr(UIC0VR),
+ mfdcr(UIC0VCR));
puts ("\nMemory (SDRAM) Configuration\n"
"mcopt1 rtr pmit mb0cf mb1cf sdtr1\n");