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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2023-05-04 18:05:25 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2023-05-08 14:59:10 +0200 |
| commit | 2054c94e3a2feefd827a9612e2ea493b77b4c85b (patch) | |
| tree | 16ef9e9c0ee259d1d13060decd6a22092050daff /configs | |
| parent | 0262268db35aa3b6da31172c4a7c6cc1cbc12221 (diff) | |
arm64: dts: k3-am625-verdin-r5: ethernet clocking workaround
Currently only the SPL running on the R5 has a clock driver. As a
workaround therefore move the assigned-clock stuff required for our
ETH_25MHz_CLK from the cpsw3g_mdio node of the regular device tree to
the a53@0 node of the R5 device tree.
Upstream-Status: Pending
Initial U-Boot to be used for bring-up and validation of the V1.0
design, we'll decide on the step forward to mainline this once the
bring-up and validation will be done.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'configs')
0 files changed, 0 insertions, 0 deletions