Coding Style cleanup

3 files changed, 82 insertions, 85 deletions

diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c
index 0db2753359e..d5c5dc869aa 100644
--- a/cpu/arm1136/cpu.c
+++ b/cpu/arm1136/cpu.c
@@ -124,8 +124,8 @@ int cleanup_before_linux (void)
 
 	/* flush I/D-cache */
 	i = 0;
-	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));  // invalidate both caches and flush btb
-	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); // mem barrier to sync things
+	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));  /* invalidate both caches and flush btb */
+	asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); /* mem barrier to sync things */
 	return(0);
 }
 
diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c
index bd7bb7c3418..e87a628c7f3 100644
--- a/cpu/arm1136/interrupts.c
+++ b/cpu/arm1136/interrupts.c
@@ -1,14 +1,11 @@
 /*
- * (C) Copyright 2004

- * Texas Instruments

- * Richard Woodruff <r-woodruff2@ti.com>

+ * (C) Copyright 2004
+ * Texas Instruments
+ * Richard Woodruff <r-woodruff2@ti.com>
  *
  * (C) Copyright 2002
  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  * Alex Zuepke <azu@sysgo.de>
  *
  * (C) Copyright 2002
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index 826c27e13c6..8cacc166362 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -1,7 +1,7 @@
 /*
  *  armboot - Startup Code for OMP2420/ARM1136 CPU-core
  *
- *  Copyright (c) 2004  Texas Instruments <r-woodruff2@ti.com>
+ *  Copyright (c) 2004	Texas Instruments <r-woodruff2@ti.com>
  *
  *  Copyright (c) 2001	Marius Gröger <mag@sysgo.de>
  *  Copyright (c) 2002	Alex Züpke <azu@sysgo.de>
@@ -19,7 +19,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -33,7 +33,7 @@
 #include <asm/arch/omap2420.h>
 
 .globl _start
-_start:	b       reset
+_start: b	reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -42,14 +42,14 @@ _start:	b       reset
 	ldr	pc, _irq
 	ldr	pc, _fiq
 
-_undefined_instruction:	.word undefined_instruction
+_undefined_instruction: .word undefined_instruction
 _software_interrupt:	.word software_interrupt
 _prefetch_abort:	.word prefetch_abort
 _data_abort:		.word data_abort
 _not_used:		.word not_used
 _irq:			.word irq
 _fiq:			.word fiq
-_pad:                   .word 0x12345678 /* now 16*4=64 */ 
+_pad:			.word 0x12345678 /* now 16*4=64 */
 .global _end_vect
 _end_vect:
 
@@ -111,22 +111,22 @@ reset:
 	msr	cpsr,r0
 
 #ifdef CONFIG_OMAP2420H4
-       /* Copy vectors to mask ROM indirect addr */ 
-        adr     r0, _start              /* r0 <- current position of code   */
-        mov     r2, #64                 /* r2 <- size to copy  */
-        add     r2, r0, r2              /* r2 <- source end address         */
-        mov     r1, #SRAM_OFFSET0         /* build vect addr */
-        mov     r3, #SRAM_OFFSET1
-        add     r1, r1, r3
-        mov     r3, #SRAM_OFFSET2
-        add     r1, r1, r3
+       /* Copy vectors to mask ROM indirect addr */
+	adr	r0, _start		/* r0 <- current position of code   */
+	mov	r2, #64			/* r2 <- size to copy  */
+	add	r2, r0, r2		/* r2 <- source end address	    */
+	mov	r1, #SRAM_OFFSET0	  /* build vect addr */
+	mov	r3, #SRAM_OFFSET1
+	add	r1, r1, r3
+	mov	r3, #SRAM_OFFSET2
+	add	r1, r1, r3
 next:
-        ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
-        stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
-        cmp     r0, r2                  /* until source end address [r2]    */
-        bne     next                    /* loop until equal */
+	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
+	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
+	cmp	r0, r2			/* until source end address [r2]    */
+	bne	next			/* loop until equal */
 #ifdef CONFIG_PARTIAL_SRAM
-	bl	cpy_clk_code            /* put dpll adjust code behind vectors */
+	bl	cpy_clk_code		/* put dpll adjust code behind vectors */
 #endif
 #endif
 	/* the mask ROM code should have PLL and others stable */
@@ -135,13 +135,13 @@ next:
 relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
-	cmp     r0, r1                  /* don't reloc during debug         */
-	beq     stack_setup
+	cmp	r0, r1			/* don't reloc during debug	    */
+	beq	stack_setup
 
 	ldr	r2, _armboot_start
 	ldr	r3, _bss_start
-	sub	r2, r3, r2		/* r2 <- size of armboot            */
-	add	r2, r0, r2		/* r2 <- source end address         */
+	sub	r2, r3, r2		/* r2 <- size of armboot	    */
+	add	r2, r0, r2		/* r2 <- source end address	    */
 
 copy_loop:
 	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
@@ -152,26 +152,26 @@ copy_loop:
 	/* Set up the stack						    */
 stack_setup:
 	ldr	r0, _TEXT_BASE		/* upper 128 KiB: relocated uboot   */
-	sub	r0, r0, #CFG_MALLOC_LEN	/* malloc area                      */
-	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
+	sub	r0, r0, #CFG_MALLOC_LEN /* malloc area			    */
+	sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo			    */
 #ifdef CONFIG_USE_IRQ
 	sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 #endif
 	sub	sp, r0, #12		/* leave 3 words for abort-stack    */
 
 clear_bss:
-	ldr	r0, _bss_start		/* find start of bss segment        */
-	ldr	r1, _bss_end		/* stop here                        */
-	mov 	r2, #0x00000000		/* clear                            */
+	ldr	r0, _bss_start		/* find start of bss segment	    */
+	ldr	r1, _bss_end		/* stop here			    */
+	mov	r2, #0x00000000		/* clear			    */
 
-clbss_l:str	r2, [r0]		/* clear loop...                    */
+clbss_l:str	r2, [r0]		/* clear loop...		    */
 	add	r0, r0, #4
 	cmp	r0, r1
 	bne	clbss_l
 
 	ldr	pc, _start_armboot
 
-_start_armboot:	.word start_armboot
+_start_armboot: .word start_armboot
 
 
 /*
@@ -205,18 +205,18 @@ cpu_init_crit:
 	mcr	p15, 0, r0, c1, c0, 0
 
 	/*
-         * Jump to board specific initialization... The Mask ROM will have already initialized
-         * basic memory.  Go here to bump up clock rate and handle wake up conditions.
+	 * Jump to board specific initialization... The Mask ROM will have already initialized
+	 * basic memory.  Go here to bump up clock rate and handle wake up conditions.
 	 */
 	adr	r0, _start		/* r0 <- current position of code   */
 	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
-	cmp     r0, r1                  /* pass on info about skipping some init portions */
-        moveq   r0,#0x1                 /* flag to skip prcm and sdrc setup */
-        movne   r0,#0x0                 
-	mov	ip, lr          /* persevere link reg across call */
-	bl	platformsetup   /* go setup pll,mux,memory */
-	mov	lr, ip          /* restore link */
-	mov	pc, lr          /* back to my caller */
+	cmp	r0, r1			/* pass on info about skipping some init portions */
+	moveq	r0,#0x1			/* flag to skip prcm and sdrc setup */
+	movne	r0,#0x0
+	mov	ip, lr		/* persevere link reg across call */
+	bl	platformsetup	/* go setup pll,mux,memory */
+	mov	lr, ip		/* restore link */
+	mov	pc, lr		/* back to my caller */
 /*
  *************************************************************************
  *
@@ -258,30 +258,30 @@ cpu_init_crit:
  */
 
 	.macro	bad_save_user_regs
-	sub	sp, sp, #S_FRAME_SIZE           @ carve out a frame on current user stack
+	sub	sp, sp, #S_FRAME_SIZE		@ carve out a frame on current user stack
 	stmia	sp, {r0 - r12}			@ Save user registers (now in svc mode) r0-r12
 
 	ldr	r2, _armboot_start
 	sub	r2, r2, #(CFG_MALLOC_LEN)
-	sub	r2, r2, #(CFG_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
-	ldmia	r2, {r2 - r3}                   @ get values for "aborted" pc and cpsr (into parm regs)
+	sub	r2, r2, #(CFG_GBL_DATA_SIZE+8)	@ set base 2 words into abort stack
+	ldmia	r2, {r2 - r3}			@ get values for "aborted" pc and cpsr (into parm regs)
 	add	r0, sp, #S_FRAME_SIZE		@ grab pointer to old stack
 
 	add	r5, sp, #S_SP
 	mov	r1, lr
-	stmia	r5, {r0 - r3}                   @ save sp_SVC, lr_SVC, pc, cpsr
-	mov	r0, sp                          @ save current stack into r0 (param register)
+	stmia	r5, {r0 - r3}			@ save sp_SVC, lr_SVC, pc, cpsr
+	mov	r0, sp				@ save current stack into r0 (param register)
 	.endm
 
 	.macro	irq_save_user_regs
 	sub	sp, sp, #S_FRAME_SIZE
 	stmia	sp, {r0 - r12}			@ Calling r0-r12
-	add     r8, sp, #S_PC                   @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
-	stmdb   r8, {sp, lr}^                   @ Calling SP, LR
-	str     lr, [r8, #0]                    @ Save calling PC
-	mrs     r6, spsr
-	str     r6, [r8, #4]                    @ Save CPSR
-	str     r0, [r8, #8]                    @ Save OLD_R0
+	add	r8, sp, #S_PC			@ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
+	stmdb	r8, {sp, lr}^			@ Calling SP, LR
+	str	lr, [r8, #0]			@ Save calling PC
+	mrs	r6, spsr
+	str	r6, [r8, #4]			@ Save CPSR
+	str	r0, [r8, #8]			@ Save OLD_R0
 	mov	r0, sp
 	.endm
 
@@ -295,31 +295,31 @@ cpu_init_crit:
 
 	.macro get_bad_stack
 	ldr	r13, _armboot_start		@ setup our mode stack (enter in banked mode)
-	sub	r13, r13, #(CFG_MALLOC_LEN)     @ move past malloc pool
+	sub	r13, r13, #(CFG_MALLOC_LEN)	@ move past malloc pool
 	sub	r13, r13, #(CFG_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
 
 	str	lr, [r13]			@ save caller lr in position 0 of saved stack
-	mrs	lr, spsr                        @ get the spsr
-	str     lr, [r13, #4]                   @ save spsr in position 1 of saved stack
+	mrs	lr, spsr			@ get the spsr
+	str	lr, [r13, #4]			@ save spsr in position 1 of saved stack
 
 	mov	r13, #MODE_SVC			@ prepare SVC-Mode
 	@ msr	spsr_c, r13
-	msr	spsr, r13                       @ switch modes, make sure moves will execute
-	mov	lr, pc                          @ capture return pc
-	movs	pc, lr                          @ jump to next instruction & switch modes.
+	msr	spsr, r13			@ switch modes, make sure moves will execute
+	mov	lr, pc				@ capture return pc
+	movs	pc, lr				@ jump to next instruction & switch modes.
 	.endm
 
 	.macro get_bad_stack_swi
-        sub     r13, r13, #4                    @ space on current stack for scratch reg.
-        str     r0, [r13]                       @ save R0's value.
+	sub	r13, r13, #4			@ space on current stack for scratch reg.
+	str	r0, [r13]			@ save R0's value.
 	ldr	r0, _armboot_start		@ get data regions start
-	sub	r0, r0, #(CFG_MALLOC_LEN)       @ move past malloc pool
-	sub	r0, r0, #(CFG_GBL_DATA_SIZE+8)  @ move past gbl and a couple spots for abort stack
+	sub	r0, r0, #(CFG_MALLOC_LEN)	@ move past malloc pool
+	sub	r0, r0, #(CFG_GBL_DATA_SIZE+8)	@ move past gbl and a couple spots for abort stack
 	str	lr, [r0]			@ save caller lr in position 0 of saved stack
-	mrs	r0, spsr                        @ get the spsr
-	str     lr, [r0, #4]                    @ save spsr in position 1 of saved stack
-        ldr     r0, [r13]                       @ restore r0
-        add     r13, r13, #4                    @ pop stack entry
+	mrs	r0, spsr			@ get the spsr
+	str	lr, [r0, #4]			@ save spsr in position 1 of saved stack
+	ldr	r0, [r13]			@ restore r0
+	add	r13, r13, #4			@ pop stack entry
 	.endm
 
 	.macro get_irq_stack			@ setup IRQ stack
@@ -333,35 +333,35 @@ cpu_init_crit:
 /*
  * exception handlers
  */
-	.align  5
+	.align	5
 undefined_instruction:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_undefined_instruction
+	bl	do_undefined_instruction
 
 	.align	5
 software_interrupt:
 	get_bad_stack_swi
 	bad_save_user_regs
-	bl 	do_software_interrupt
+	bl	do_software_interrupt
 
 	.align	5
 prefetch_abort:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_prefetch_abort
+	bl	do_prefetch_abort
 
 	.align	5
 data_abort:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_data_abort
+	bl	do_data_abort
 
 	.align	5
 not_used:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_not_used
+	bl	do_not_used
 
 #ifdef CONFIG_USE_IRQ
 
@@ -369,7 +369,7 @@ not_used:
 irq:
 	get_irq_stack
 	irq_save_user_regs
-	bl 	do_irq
+	bl	do_irq
 	irq_restore_user_regs
 
 	.align	5
@@ -377,7 +377,7 @@ fiq:
 	get_fiq_stack
 	/* someone ought to write a more effiction fiq_save_user_regs */
 	irq_save_user_regs
-	bl 	do_fiq
+	bl	do_fiq
 	irq_restore_user_regs
 
 #else
@@ -386,13 +386,13 @@ fiq:
 irq:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_irq
+	bl	do_irq
 
 	.align	5
 fiq:
 	get_bad_stack
 	bad_save_user_regs
-	bl 	do_fiq
+	bl	do_fiq
 
 #endif
 	.align 5
@@ -404,9 +404,9 @@ arm1136_cache_flush:
 	.align	5
 .globl reset_cpu
 reset_cpu:
-	ldr	r1, rstctl      /* get addr for global reset reg */
-	mov     r3, #0x3	/* full reset pll+mpu */
-	str	r3, [r1]        /* force reset */
+	ldr	r1, rstctl	/* get addr for global reset reg */
+	mov	r3, #0x3	/* full reset pll+mpu */
+	str	r3, [r1]	/* force reset */
 	mov	r0, r0
 _loop_forever:
 	b	_loop_forever