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authorWolfgang Denk <wd@denx.de>2009-11-15 23:13:40 +0100
committerWolfgang Denk <wd@denx.de>2009-11-15 23:13:40 +0100
commit06f43286c6354aaab0103615e83893512f86eee7 (patch)
treec0c6bc4819fa381a9e1a2a051492eb4813bd410b /cpu/mpc85xx
parentc758e947aa7d39a2be607ecdedd818ad300807b2 (diff)
parent3c014f1586d5bfe30dca7549396915c83f31cd30 (diff)
Merge branch 'master' into next
Diffstat (limited to 'cpu/mpc85xx')
-rw-r--r--cpu/mpc85xx/release.S12
-rw-r--r--cpu/mpc85xx/tlb.c4
2 files changed, 10 insertions, 6 deletions
diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index a1ae78a7f55..433ff025448 100644
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -102,18 +102,22 @@ __secondary_start_page:
#ifdef CONFIG_BACKSIDE_L2_CACHE
/* Enable/invalidate the L2 cache */
msync
- lis r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
- ori r3,r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
- mtspr SPRN_L2CSR0,r3
+ lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h
+ ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l
+ mtspr SPRN_L2CSR0,r2
1:
mfspr r3,SPRN_L2CSR0
- andis. r1,r3,L2CSR0_L2FI@h
+ and. r1,r3,r2
bne 1b
lis r3,CONFIG_SYS_INIT_L2CSR0@h
ori r3,r3,CONFIG_SYS_INIT_L2CSR0@l
mtspr SPRN_L2CSR0,r3
isync
+2:
+ mfspr r3,SPRN_L2CSR0
+ andis. r1,r3,L2CSR0_L2E@h
+ beq 2b
#endif
#define EPAPR_MAGIC (0x45504150)
diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c
index 6e94c237ad8..ea5deb2971f 100644
--- a/cpu/mpc85xx/tlb.c
+++ b/cpu/mpc85xx/tlb.c
@@ -132,10 +132,10 @@ int find_tlb_idx(void *addr, u8 tlbsel)
void init_addr_map(void)
{
int i;
- unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
+ unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff;
/* walk all the entries */
- for (i = 0; i < max_cam; i++) {
+ for (i = 0; i < num_cam; i++) {
unsigned long epn;
u32 tsize, _mas1;
phys_addr_t rpn;