diff options
| author | Terry Lv <r65388@freescale.com> | 2011-08-24 16:15:47 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2011-09-01 13:57:21 +0800 |
| commit | 7db399587fe4cd8d0e77491e9b2fad47c0a82be2 (patch) | |
| tree | 7c4b34e73aff3607eb7dec6ea522203da355f5b3 /cpu | |
| parent | ea7a4199586b4b9cd9a4e13c0e420a4e1699a297 (diff) | |
ENGR00155283: Set dpgdck0_2_en to 0 when freq is lower than 300MHz
1. Set dpgdck0_2_en to 0 when required freq is lower than 300Mhz.
2. When dpgdck0_2_en is 0, the formula to calculate output freq
will be changed to 2 * freq * [].
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/arm_cortexa8/mx53/generic.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu/arm_cortexa8/mx53/generic.c b/cpu/arm_cortexa8/mx53/generic.c index 135746244f..d54bf2cf61 100644 --- a/cpu/arm_cortexa8/mx53/generic.c +++ b/cpu/arm_cortexa8/mx53/generic.c @@ -94,8 +94,10 @@ struct pll_param { static u32 __decode_pll(enum pll_clocks pll, u32 infreq) { - u32 mfi, mfn, mfd, pd; + u32 mfi, mfn, mfd, pd, ctrl, mult; + ctrl = __REG(pll + MXC_PLL_DP_CTL); + mult = (ctrl & MXC_PLL_DP_CTL_DPDCK0_2_EN) ? 4 : 2; mfn = __REG(pll + MXC_PLL_DP_MFN); mfd = __REG(pll + MXC_PLL_DP_MFD) + 1; mfi = __REG(pll + MXC_PLL_DP_OP); @@ -103,7 +105,7 @@ static u32 __decode_pll(enum pll_clocks pll, u32 infreq) mfi = (mfi >> 4) & 0xF; mfi = (mfi >= 5) ? mfi : 5; - return ((4 * (infreq / 1000) * (mfi * mfd + mfn)) / (mfd * pd)) * 1000; + return ((mult * (infreq / 1000) * (mfi * mfd + mfn)) / (mfd * pd)) * 1000; } static u32 __get_mcu_main_clk(void) |