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authorStefan Roese <sr@denx.de>2007-08-08 09:54:26 +0200
committerStefan Roese <sr@denx.de>2007-08-08 09:54:26 +0200
commit3ba4c2d68f6541db4677b4aea12071f56e6ff6e6 (patch)
tree0acc960ad4c87265bf1fac748b0ab3a471aad635 /cpu
parenta41de1f0d373e09c782dea558385a06247111ba5 (diff)
Coding style cleanup
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mcf532x/cpu_init.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
index eb9b7a4070f..93086f74bf0 100644
--- a/cpu/mcf532x/cpu_init.c
+++ b/cpu/mcf532x/cpu_init.c
@@ -71,35 +71,35 @@ void cpu_init_f(void)
#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
/* Latch chipselect */
- gpio->par_cs |= GPIO_PAR_CS1;
+ gpio->par_cs |= GPIO_PAR_CS1;
fbcs->csar1 = CFG_CS1_BASE;
fbcs->cscr1 = CFG_CS1_CTRL;
fbcs->csmr1 = CFG_CS1_MASK;
#endif
#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
- gpio->par_cs |= GPIO_PAR_CS2;
+ gpio->par_cs |= GPIO_PAR_CS2;
fbcs->csar2 = CFG_CS2_BASE;
fbcs->cscr2 = CFG_CS2_CTRL;
fbcs->csmr2 = CFG_CS2_MASK;
#endif
#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
- gpio->par_cs |= GPIO_PAR_CS3;
+ gpio->par_cs |= GPIO_PAR_CS3;
fbcs->csar3 = CFG_CS3_BASE;
fbcs->cscr3 = CFG_CS3_CTRL;
fbcs->csmr3 = CFG_CS3_MASK;
#endif
#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
- gpio->par_cs |= GPIO_PAR_CS4;
+ gpio->par_cs |= GPIO_PAR_CS4;
fbcs->csar4 = CFG_CS4_BASE;
fbcs->cscr4 = CFG_CS4_CTRL;
fbcs->csmr4 = CFG_CS4_MASK;
#endif
#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
- gpio->par_cs |= GPIO_PAR_CS5;
+ gpio->par_cs |= GPIO_PAR_CS5;
fbcs->csar5 = CFG_CS5_BASE;
fbcs->cscr5 = CFG_CS5_CTRL;
fbcs->csmr5 = CFG_CS5_MASK;
@@ -139,4 +139,3 @@ void uart_port_conf(void)
break;
}
}
-