Update make target for ARM supported boards.

Use lowlevel_init() instead of platformsetup() [rename].
Patch by Peter Pearse, 06 Oct 2005

9 files changed, 41 insertions, 10 deletions

diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c
index 23236dcb0ff..6b1449e97a7 100644
--- a/cpu/arm1136/interrupts.c
+++ b/cpu/arm1136/interrupts.c
@@ -32,7 +32,11 @@
 
 #include <common.h>
 #include <asm/arch/bits.h>
-#include <asm/arch/omap2420.h>
+
+#if !defined(CONFIG_INTEGRATOR) || ! defined(CONFIG_ARCH_CINTEGRATOR)
+# include <asm/arch/omap2420.h>
+#endif
+
 #include <asm/proc-armv/ptrace.h>
 
 #define TIMER_LOAD_VAL 0
@@ -175,6 +179,9 @@ void do_irq (struct pt_regs *pt_regs)
 static ulong timestamp;
 static ulong lastinc;
 
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
+/* Use the IntegratorCP function from board/integratorcp.c */
+#else
 /* nothing really to do with interrupts, just starts up a counter. */
 int interrupt_init (void)
 {
@@ -189,7 +196,6 @@ int interrupt_init (void)
 
 	return(0);
 }
-
 /*
  * timer without interrupts
  */
@@ -281,7 +287,6 @@ unsigned long long get_ticks(void)
 {
 	return get_timer(0);
 }
-
 /*
  * This function is derived from PowerPC code (timebase clock frequency).
  * On ARM it returns the number of timer ticks per second.
@@ -292,3 +297,4 @@ ulong get_tbclk (void)
 	tbclk = CFG_HZ;
 	return tbclk;
 }
+#endif /* !Integrator/CP */
diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S
index c3bf6e37e1c..05c9128d848 100644
--- a/cpu/arm1136/start.S
+++ b/cpu/arm1136/start.S
@@ -210,7 +210,7 @@ cpu_init_crit:
 	 * basic memory.  Go here to bump up clock rate and handle wake up conditions.
 	 */
 	mov	ip, lr		/* persevere link reg across call */
-	bl	platformsetup	/* go setup pll,mux,memory */
+	bl	lowlevel_init	/* go setup pll,mux,memory */
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 /*
@@ -397,6 +397,10 @@ arm1136_cache_flush:
 		mcr	p15, 0, r1, c7, c5, 0	@ invalidate I cache
 		mov	pc, lr			@ back to caller
 
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR)
+/* Use the IntegratorCP function from board/integratorcp/platform.S */
+#else
+
 	.align	5
 .globl reset_cpu
 reset_cpu:
@@ -408,3 +412,5 @@ _loop_forever:
 	b	_loop_forever
 rstctl:
 	.word	PM_RSTCTRL_WKUP
+
+#endif
diff --git a/cpu/arm720t/cpu.c b/cpu/arm720t/cpu.c
index fcca360732b..a5b6de76055 100644
--- a/cpu/arm720t/cpu.c
+++ b/cpu/arm720t/cpu.c
@@ -76,6 +76,8 @@ int cleanup_before_linux (void)
 #elif defined(CONFIG_NETARM) || defined(CONFIG_S3C4510B)
 	disable_interrupts ();
 	/* Nothing more needed */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No cleanup before linux for IntegratorAP/CM720T as yet */
 #else
 #error No cleanup_before_linux() defined for this CPU type
 #endif
@@ -245,6 +247,11 @@ int dcache_status (void)
 	return icache_status();
 }
 
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No specific cache setup for IntegratorAP/CM720T as yet */
+	void icache_enable (void)
+	{
+	}
 #else
 #error No icache/dcache enable/disable functions defined for this CPU type
 #endif
diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c
index d0eaca5e027..575d923a373 100644
--- a/cpu/arm720t/interrupts.c
+++ b/cpu/arm720t/interrupts.c
@@ -193,6 +193,8 @@ void do_irq (struct pt_regs *pt_regs)
 		/* clear pending interrupt */
 		PUT_REG( REG_INTPEND, (1<<(pending>>2)));
 	}
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No do_irq() for IntegratorAP/CM720T as yet */
 #else
 #error do_irq() not defined for this CPU type
 #endif
@@ -219,6 +221,10 @@ static void timer_isr( void *data) {
 static ulong timestamp;
 static ulong lastdec;
 
+#if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* Use IntegratorAP routines in board/integratorap.c */
+#else
+
 int interrupt_init (void)
 {
 
@@ -296,6 +302,8 @@ int interrupt_init (void)
 	return (0);
 }
 
+#endif /* ! IntegratorAP */
+
 /*
  * timer without interrupts
  */
@@ -398,6 +406,8 @@ void udelay (unsigned long usec)
 
 }
 
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No timer routines for IntegratorAP/CM720T as yet */
 #else
 #error Timer routines not defined for this CPU type
 #endif
diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S
index eb26476a666..43582b3284d 100644
--- a/cpu/arm720t/start.S
+++ b/cpu/arm720t/start.S
@@ -301,6 +301,8 @@ cpu_init_crit:
 	ldr r1, =0x83ffffa0	/* cache-disabled  */
 	str r1, [r0]
 
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No specific initialisation for IntegratorAP/CM720T as yet */
 #else
 #error No cpu_init_crit() defined for current CPU type
 #endif
@@ -316,12 +318,12 @@ cpu_init_crit:
 	str	r1, [r0]
 #endif
 
+	mov	ip, lr
 	/*
 	 * before relocating, we have to setup RAM timing
 	 * because memory timing is board-dependent, you will
 	 * find a lowlevel_init.S in your board directory.
 	 */
-	mov	ip, lr
 	bl	lowlevel_init
 	mov	lr, ip
 
@@ -530,6 +532,8 @@ reset_cpu:
 #elif defined(CONFIG_S3C4510B)
 /* Nothing done here as reseting the CPU is board specific, depending
  * on external peripherals such as watchdog timers, etc. */
+#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
+	/* No specific reset actions for IntegratorAP/CM720T as yet */
 #else
 #error No reset_cpu() defined for current CPU type
 #endif
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 74a97d52903..4603cf57337 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -255,7 +255,6 @@ cpu_init_crit:
 	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
 	mcr	p15, 0, r0, c1, c0, 0
 
-
 	/*
 	 * before relocating, we have to setup RAM timing
 	 * because memory timing is board-dependend, you will
@@ -264,7 +263,6 @@ cpu_init_crit:
 	mov	ip, lr
 	bl	lowlevel_init
 	mov	lr, ip
-
 	mov	pc, lr
 
 
diff --git a/cpu/arm925t/start.S b/cpu/arm925t/start.S
index 238925936ea..acd77426d30 100644
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -246,7 +246,7 @@ cpu_init_crit:
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
 	mov	ip, lr          /* perserve link reg across call */
-	bl	platformsetup   /* go setup pll,mux,memory */
+	bl	lowlevel_init   /* go setup pll,mux,memory */
 	mov	lr, ip          /* restore link */
 	mov	pc, lr          /* back to my caller */
 /*
diff --git a/cpu/arm926ejs/start.S b/cpu/arm926ejs/start.S
index 5f5a1c59690..fc6b20b21e3 100644
--- a/cpu/arm926ejs/start.S
+++ b/cpu/arm926ejs/start.S
@@ -222,7 +222,7 @@ cpu_init_crit:
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
 	mov	ip, lr		/* perserve link reg across call */
-	bl	platformsetup	/* go setup pll,mux,memory */
+	bl	lowlevel_init	/* go setup pll,mux,memory */
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 /*
diff --git a/cpu/arm946es/start.S b/cpu/arm946es/start.S
index ef3be8ec935..e8c908bf281 100644
--- a/cpu/arm946es/start.S
+++ b/cpu/arm946es/start.S
@@ -214,7 +214,7 @@ cpu_init_crit:
 	 * Go setup Memory and board specific bits prior to relocation.
 	 */
 	mov	ip, lr		/* perserve link reg across call */
-	bl	platformsetup	/* go setup memory */
+	bl	lowlevel_init	/* go setup memory */
 	mov	lr, ip		/* restore link */
 	mov	pc, lr		/* back to my caller */
 /*