diff options
author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /doc/README.generic_usb_ohci | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'doc/README.generic_usb_ohci')
-rw-r--r-- | doc/README.generic_usb_ohci | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci index 147ea514ae9..ba7cea83ca8 100644 --- a/doc/README.generic_usb_ohci +++ b/doc/README.generic_usb_ohci @@ -11,24 +11,24 @@ Configuration options CONFIG_USB_OHCI_NEW: enable the new OHCI driver - CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks: + CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks: - extern int usb_board_init(void); - extern int usb_board_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks: + CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks: - extern int usb_cpu_init(void); - extern int usb_cpu_stop(void); - extern int usb_cpu_init_fail(void); - CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI + CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI registers - CFG_USB_OHCI_SLOT_NAME: slot name + CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name - CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the + CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the root hub. @@ -39,7 +39,7 @@ The USB bus operates in little endian, but unfortunately there are OHCI controllers that operate in big endian such as ppc4xx and mpc5xxx. For these the config option - CFG_OHCI_BE_CONTROLLER + CONFIG_SYS_OHCI_BE_CONTROLLER needs to be defined. @@ -60,4 +60,4 @@ If undefined, the first instance found in PCI space will be used. PCI Controllers need to do byte swapping on register accesses, so they should to define: - CFG_OHCI_SWAP_REG_ACCESS + CONFIG_SYS_OHCI_SWAP_REG_ACCESS |