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| author | Tom Rini <trini@konsulko.com> | 2016-01-28 10:07:22 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-01-28 10:07:22 -0500 |
| commit | 4b5a4a0535e280279e8cab93ba6d4aad53896bda (patch) | |
| tree | 4fa29a88ad6e46ed889b65fef753f835a3685a67 /doc/device-tree-bindings | |
| parent | cd85bec36d0e0d16fedb00e0c434ed070a9c6b37 (diff) | |
| parent | 81aaa3d9fce5ce9641e5f0c3354da876d859b3b6 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-x86
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/misc/intel,baytrail-fsp.txt | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt index b44b5b5431f..07fa46ef7ef 100644 --- a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt +++ b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt @@ -74,12 +74,41 @@ discovered by the FSP and used to setup main memory. # Integer properties: - - fsp,dram-speed + - fsp,dram-speed: + 0x0: "800 MHz" + 0x1: "1066 MHz" + 0x2: "1333 MHz" + 0x3: "1600 MHz" + - fsp,dram-type + 0x0: "DDR3" + 0x1: "DDR3L" + 0x2: "DDR3U" + 0x4: "LPDDR2" + 0x5: "LPDDR3" + 0x6: "DDR4" + - fsp,dimm-width + 0x0: "x8" + 0x1: "x16" + 0x2: "x32" + - fsp,dimm-density + 0x0: "1 Gbit" + 0x1: "2 Gbit" + 0x2: "4 Gbit" + 0x3: "8 Gbit" + - fsp,dimm-bus-width + 0x0: "8 bits" + 0x1: "16 bits" + 0x2: "32 bits" + 0x3: "64 bits" + - fsp,dimm-sides + 0x0: "1 rank" + 0x1: "2 ranks" + - fsp,dimm-tcl - fsp,dimm-trpt-rcd - fsp,dimm-twr |