diff options
| author | Simon Glass <sjg@chromium.org> | 2014-07-07 10:16:39 -0600 |
|---|---|---|
| committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2014-08-06 00:18:01 +0530 |
| commit | 22052c6236cbebc446ffd51ac69271fe063c654a (patch) | |
| tree | d1620dd86f989f4481a760fa4c41b684ba6896ab /doc/device-tree-bindings | |
| parent | a4e29db2571144a05ad09380b3674fe5b492f693 (diff) | |
spi: Support half-duplex mode in FDT decode
This parameter should also be supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'doc/device-tree-bindings')
| -rw-r--r-- | doc/device-tree-bindings/spi/spi-bus.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/spi/spi-bus.txt b/doc/device-tree-bindings/spi/spi-bus.txt index 800dafe5b01..5c8720a820a 100644 --- a/doc/device-tree-bindings/spi/spi-bus.txt +++ b/doc/device-tree-bindings/spi/spi-bus.txt @@ -59,6 +59,8 @@ contain the following properties. used for MOSI. Defaults to 1 if not present. - spi-rx-bus-width - (optional) The bus width(number of data wires) that used for MISO. Defaults to 1 if not present. +- spi-half-duplex - (optional) Indicates that the SPI bus should wait for + a header byte before reading data from the slave. Some SPI controllers and devices support Dual and Quad SPI transfer mode. It allows data in SPI system transfered in 2 wires(DUAL) or 4 wires(QUAD). |