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authorMario Six <mario.six@gdsys.cc>2018-09-27 09:19:30 +0200
committerAnatolij Gustschin <agust@denx.de>2018-09-28 18:26:44 +0200
commit9671f696e52b1af72fe5566bf5a6fefc6a6fefa5 (patch)
treea8710223c4cae68c32e16063c0063241d22b4a42 /doc
parent39a336f116e97d936268b1d317f22a007a01528d (diff)
video_osd: Add ihs_video_out driver
Add a driver for IHS OSDs on IHS FPGAs. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'doc')
-rw-r--r--doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt b/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt
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+++ b/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt
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+* Guntermann & Drunck Integrated Hardware Systems OSD
+
+Required properties:
+- compatible: "gdsys,ihs_video_out"
+- reg: A combination of three register spaces:
+ - Register base for the video registers
+ - Register base for the OSD registers
+ - Address of the OSD video memory
+- mode: The initial resolution and frequency: "1024_768_60", "720_400_70", or
+ "640_480_70"
+- clk_gen: phandle to the pixel clock generator
+- dp_tx: phandle to the display associated with the OSD
+
+Example:
+
+fpga0_video0 {
+ compatible = "gdsys,ihs_video_out";
+ reg = <0x100 0x40
+ 0x180 0x20
+ 0x1000 0x1000>;
+ dp_tx = <&fpga0_dp_video0>;
+ clk_gen = <&fpga0_video0_clkgen>;
+};