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authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>2025-08-03 18:24:38 -0700
committerTien Fong Chee <tien.fong.chee@intel.com>2025-08-08 22:20:48 +0800
commit362c355dd7346166986de280226750fb328b69d3 (patch)
treee3cec5c357bf1b3a62967fb3f5ab7984f4758ee6 /drivers/ddr/altera/sdram_gen5.c
parent1dc683005dd22b6fdf47845a2c0db00a55033ad9 (diff)
ddr: altera: soc64: Add secure region support for ATF flow
Setting up firewall regions based on SDRAM memory banks configuration (up to CONFIG_NR_DRAM_BANKS banks) instead of using whole address space. First 1 MiB (0 to 0xfffff) of SDRAM is configured as secure region, other address spaces are non-secure regions. The ARM Trusted Firmware (ATF) image is located in this first 1 MiB memory region. So, this can prevent software executing at non-secure state EL0-EL2 and non-secure masters access to secure region. Add common function for firewall setup and reuse for all SoC64 devices. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_gen5.c')
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