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authorJonas Karlman <jonas@kwiboo.se>2024-12-12 23:57:16 +0000
committerTom Rini <trini@konsulko.com>2025-01-10 18:56:21 -0600
commit0187fcc3c02fe7e8e4511d48d8ad03bdff168b7b (patch)
tree42cc85031eb79f708be953bf7f0bfeb36fa9854c /drivers/ddr/marvell/a38x/ddr3_training.c
parent1c34c315e7b6fb921a6a63d562ef9cd45aad7d31 (diff)
rockchip: rk3399-gru: Enable dcache and signature validation in SPL
With TPL being used to init DRAM, SPL being used to load FIT and the adjusted FIT payload offset it is now possible to increase the size limit of SPL to 256 KB and enable uses of dcache and FIT signature validation. Drop SPL_SYS_DCACHE_OFF=y to enable use of dcache in SPL. Drop SPL_FIT_SIGNATURE=n to enable signature validation of FIT in SPL. Change SPL_MAX_SIZE to 256 KB now that payload offset has moved in SPI and TF-A may be loaded to 0x40000 in DRAM. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training.c')
0 files changed, 0 insertions, 0 deletions