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| author | Michal Simek <michal.simek@xilinx.com> | 2021-02-02 16:34:48 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-02-10 13:21:12 +0100 |
| commit | 98757d87ee04cd8f57e9f2d6a8017a1d1a4ea646 (patch) | |
| tree | 06a8e236b49b6f9a88f9e0be65f9bcc493351de5 /drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c | |
| parent | fc3c6fd75298b69175cc4a0732759f5e1054dc21 (diff) | |
xilinx: Show silicon version in SPL
Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is
useful to be aware.
The patch is also fixing possition of these bits on ZynqMP.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c')
0 files changed, 0 insertions, 0 deletions