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| author | Michal Simek <michal.simek@xilinx.com> | 2021-08-19 11:09:37 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2021-08-26 08:14:43 +0200 |
| commit | 570c4636808e77a18ccd8865b2654fff08f13328 (patch) | |
| tree | ecee3de024d98c033055140eefdef144f555919c /drivers/ddr/marvell/axp/ddr3_axp.h | |
| parent | 5bd5ee02b23be2062c5e0c194355534eaa7e7854 (diff) | |
Makefile: Align fit-dtb.blob and u-boot.itb by 64bits
Enabling MULTI_DTB_FIT and DTB_RESELECT can end up with multi DTBs in FIT
image placed and aligned only by 32bits (4bytes). Based on device tree
specification:
"Specifically, the memory reservation block shall be aligned to an 8-byte boundary
and the structure block to a 4-byte boundary."
is 64bit (8bytes) alignment required. That's why make sure that
fit-dtb.blob and u-boot.itb as our primary target images for Xilinx ZynqMP
are all 64bit aligned.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'drivers/ddr/marvell/axp/ddr3_axp.h')
0 files changed, 0 insertions, 0 deletions