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authorMichal Simek <michal.simek@xilinx.com>2013-04-22 15:43:02 +0200
committerMichal Simek <michal.simek@xilinx.com>2013-05-06 10:41:24 +0200
commitd5dae85f23c7c902731512e451afde9a6e4a250a (patch)
tree8b7230045d9b0c43400e2ed661fb9282c662472c /drivers/fpga/Makefile
parent5bd0bd7cef396a830996b4ad91b89b7d205c7298 (diff)
fpga: zynq: Add support for loading bitstream
Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers/fpga/Makefile')
-rw-r--r--drivers/fpga/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index b48f623c180..0b51dcdef37 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -30,6 +30,7 @@ COBJS-y += fpga.o
COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
+COBJS-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o
COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
COBJS-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o
ifdef CONFIG_FPGA_ALTERA