diff options
| author | Tom Rini <trini@konsulko.com> | 2019-12-18 07:20:19 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-12-18 07:20:19 -0500 |
| commit | c0912f9bbfb26dd03d189953678691b799d35b6e (patch) | |
| tree | f879600cd26b8d4678a174854b623941e5dc2ada /drivers/timer/tsc_timer.c | |
| parent | 533c9f5714bdba79dc6f2629284d4c1a08a611d1 (diff) | |
| parent | a1d6dc3f84071f05574044f337dbdca70fae495d (diff) | |
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next
- Various x86 common codes updated for TPL/SPL
- I2C designware driver updated for PCI
- ICH SPI driver updated to support Apollo Lake
- Add Intel FSP2 base support
- Intel Apollo Lake platform specific drivers support
- Add a new board Google Chromebook Coral
Diffstat (limited to 'drivers/timer/tsc_timer.c')
| -rw-r--r-- | drivers/timer/tsc_timer.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 0df551f94cc..43cb2d820e8 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -50,8 +50,7 @@ static unsigned long native_calibrate_tsc(void) return 0; crystal_freq = tsc_info.ecx / 1000; - - if (!crystal_freq) { + if (!CONFIG_IS_ENABLED(X86_TSC_TIMER_NATIVE) && !crystal_freq) { switch (gd->arch.x86_model) { case INTEL_FAM6_SKYLAKE_MOBILE: case INTEL_FAM6_SKYLAKE_DESKTOP: @@ -397,7 +396,8 @@ static void tsc_timer_ensure_setup(bool early) { if (gd->arch.tsc_inited) return; - gd->arch.tsc_base = rdtsc(); + if (IS_ENABLED(CONFIG_X86_TSC_READ_BASE)) + gd->arch.tsc_base = rdtsc(); if (!gd->arch.clock_rate) { unsigned long fast_calibrate; @@ -406,6 +406,10 @@ static void tsc_timer_ensure_setup(bool early) if (fast_calibrate) goto done; + /* Reduce code size by dropping other methods */ + if (CONFIG_IS_ENABLED(X86_TSC_TIMER_NATIVE)) + panic("no timer"); + fast_calibrate = cpu_mhz_from_cpuid(); if (fast_calibrate) goto done; |