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authorBin Meng <bmeng.cn@gmail.com>2018-06-23 03:03:47 -0700
committerBin Meng <bmeng.cn@gmail.com>2018-07-02 09:23:28 +0800
commit94e72a6bd994078674188bee2efb727a110a1cc6 (patch)
tree226e8ffdafc1231a7b0019e8c9a8a1d274d52fa2 /drivers/timer
parent2121bbe49c27b2b2d865fac4e4071c5a90ae90b2 (diff)
x86: timer: tsc: Allow specifying clock rate from device tree again
With the introduction of early timer support in the TSC driver, the capability of getting clock rate from device tree was lost unfortunately. Now we bring such functionality back, but with a limitation that when TSC is used as early timer, specifying clock rate from device tree does not work. This fixes random boot failures seen on QEMU targets: printing "TSC frequency is ZERO" and reset forever. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/timer')
-rw-r--r--drivers/timer/tsc_timer.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index cf869998bf9..747f190d384 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -377,14 +377,23 @@ static int tsc_timer_probe(struct udevice *dev)
{
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- tsc_timer_ensure_setup();
- uc_priv->clock_rate = gd->arch.clock_rate;
+ if (!uc_priv->clock_rate) {
+ tsc_timer_ensure_setup();
+ uc_priv->clock_rate = gd->arch.clock_rate;
+ } else {
+ gd->arch.tsc_base = rdtsc();
+ }
return 0;
}
unsigned long notrace timer_early_get_rate(void)
{
+ /*
+ * When TSC timer is used as the early timer, be warned that the timer
+ * clock rate can only be calibrated via some hardware ways. Specifying
+ * it in the device tree won't work for the early timer.
+ */
tsc_timer_ensure_setup();
return gd->arch.clock_rate;