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authorSimek, Michal <michal.simek@amd.com>2024-04-17 20:06:13 -1200
committerMichal Simek <michal.simek@amd.com>2024-06-17 16:02:29 +0200
commit11716acde9a73c24f1d48869ccefcd564044fab0 (patch)
tree2b9281dd83b9036b7f5a9e8ed76d8531c5f62f72 /drivers
parent7abd4357a493aaf829214e893b78c941be4ff959 (diff)
sdhci: zynq: Fix tap delay for SD on Versal NET
I can't see any way how tap delays are setup on Versal NET platform because xlnx,versal-8.9a compatible string is also used there but driver is not letting to setup tap delays. Not sure if versal_iclk_phases[] is also valid for Versal NET but the patch is made to investigate it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e535cfc1a59b5146a5c9a3ab389dc770de80440c.1713427490.git.michal.simek@amd.com
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/zynq_sdhci.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 898be5a0913..8a83adef434 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -865,7 +865,8 @@ static int arasan_sdhci_set_tapdelay(struct sdhci_host *host)
ret = sdhci_zynqmp_sdcardclk_set_phase(host, oclk_phase);
if (ret)
return ret;
- } else if (IS_ENABLED(CONFIG_ARCH_VERSAL) &&
+ } else if ((IS_ENABLED(CONFIG_ARCH_VERSAL) ||
+ IS_ENABLED(CONFIG_ARCH_VERSAL_NET)) &&
device_is_compatible(dev, "xlnx,versal-8.9a")) {
ret = sdhci_versal_sampleclk_set_phase(host, iclk_phase);
if (ret)
@@ -941,7 +942,8 @@ static void arasan_dt_parse_clk_phases(struct udevice *dev)
}
}
- if (IS_ENABLED(CONFIG_ARCH_VERSAL) &&
+ if ((IS_ENABLED(CONFIG_ARCH_VERSAL) ||
+ IS_ENABLED(CONFIG_ARCH_VERSAL_NET)) &&
device_is_compatible(dev, "xlnx,versal-8.9a")) {
for (i = 0; i <= MMC_TIMING_MMC_HS400; i++) {
clk_data->clk_phase_in[i] = versal_iclk_phases[i];