diff options
author | wdenk <wdenk> | 2003-03-12 10:41:04 +0000 |
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committer | wdenk <wdenk> | 2003-03-12 10:41:04 +0000 |
commit | 3bac351370ef7cbf9d2af27ba52bee1703ad677e (patch) | |
tree | 689fbd22fcde4e63a0f4909acb3ea65475099e9c /include/commproc.h | |
parent | 1cb8e980c41e86760fa93de63f4e4cf643bef9d9 (diff) |
* Patch by Josef Wagner, 12 Mar 2003:
- 16/32 MB and 50/80 MHz support with auto-detection for IP860
- ETH05 and BEDBUG support for CU824
- added support for MicroSys CPC45
- new BOOTROM/FLASH0 and DOC base for PM826
* Patch by Robert Schwebel, 12 Mar 2003:
Fix the chpart command on innokom board
* Name cleanup:
mv include/asm-i386/ppcboot-i386.h include/asm-i386/u-boot-i386.h
s/PPCBoot/U-Boot/ in some files
s/pImage/uImage/ in some files
* Patch by Detlev Zundel, 15 Jan 2003:
Fix '' command line quoting
* Patch by The LEOX team, 19 Jan 2003:
- add support for the ELPT860 board
- add support for Dallas ds164x RTC
Diffstat (limited to 'include/commproc.h')
-rw-r--r-- | include/commproc.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/commproc.h b/include/commproc.h index 159c294f844..5ff82b71a88 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -595,6 +595,32 @@ typedef struct scc_enet { #endif /* CONFIG_PCU_E, CONFIG_CCM */ +/*** ELPT860 *********************************************************/ + +#ifdef CONFIG_ELPT860 +/* Bits in parallel I/O port registers that have to be set/cleared + * to configure the pins for SCC1 use. + */ +# define PROFF_ENET PROFF_SCC1 +# define CPM_CR_ENET CPM_CR_CH_SCC1 +# define SCC_ENET 0 + +# define PA_ENET_RXD ((ushort)0x0001) /* PA 15 */ +# define PA_ENET_TXD ((ushort)0x0002) /* PA 14 */ +# define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ +# define PA_ENET_TCLK ((ushort)0x0200) /* PA 6 */ + +# define PC_ENET_TENA ((ushort)0x0001) /* PC 15 */ +# define PC_ENET_CLSN ((ushort)0x0010) /* PC 11 */ +# define PC_ENET_RENA ((ushort)0x0020) /* PC 10 */ + +/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK1) to + * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. + */ +# define SICR_ENET_MASK ((uint)0x000000FF) +# define SICR_ENET_CLKRT ((uint)0x00000025) +#endif /* CONFIG_ELPT860 */ + /*** ESTEEM 192E **************************************************/ #ifdef CONFIG_ESTEEM192E /* ESTEEM192E |