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authorHeiko Schocher <hs@denx.de>2012-10-24 13:48:22 +0200
committerHeiko Schocher <hs@denx.de>2013-07-23 08:34:53 +0200
commit00f792e0df9ae942427e44595a0f4379582accee (patch)
tree34bfe42e8b720ed412ffa481b916a36fb1adcd60 /include/configs/HWW1U1A.h
parentea818dbbcd59300b56014ac2d67798a54994eb9b (diff)
i2c, fsl_i2c: switch to new multibus/multiadapter support
- added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'include/configs/HWW1U1A.h')
-rw-r--r--include/configs/HWW1U1A.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h
index 2b72a33487f..0284f457326 100644
--- a/include/configs/HWW1U1A.h
+++ b/include/configs/HWW1U1A.h
@@ -218,16 +218,16 @@
/* -------------------------------------------------------------------- */
/* Generic FreeScale hardware I2C support */
-#define CONFIG_HARD_I2C
-#define CONFIG_FSL_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED 400000
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
+#define CONFIG_SYS_FSL_I2C2_SPEED 400000
+#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
+#define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} }
#define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_I2C_OFFSET 0x3000
-#define CONFIG_SYS_I2C2_OFFSET 0x3100
-
-/* I2C bus configuration */
-#define CONFIG_SYS_I2C_SPEED 400000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
/* DDR2 SO-RDIMM SPD EEPROM is at I2C0-0x51 */
#define CONFIG_SYS_SPD_BUS_NUM 0