diff options
| author | Ira W. Snyder <iws@ovro.caltech.edu> | 2012-09-12 14:17:32 -0700 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2012-09-18 16:16:44 -0500 |
| commit | ea1ea54e35e64386cc9eefbf0d96091430a7482a (patch) | |
| tree | fdbede6b7a329162626a6822c53f9abc8657b92b /include/configs/MPC8308RDB.h | |
| parent | f138ca1373d7ec9fca33ae21f1b5ff3898fd493f (diff) | |
mpc8308rdb: add support for Spansion SPI flash on header J8
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.
This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8308RDB.h')
| -rw-r--r-- | include/configs/MPC8308RDB.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 7f2761c5391..a24538ad206 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -340,6 +340,19 @@ #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 +/* + * SPI on header J8 + * + * WARNING: enabling this will break TSEC2 (connected to the Vitesse switch) + * due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins. + */ +#ifdef CONFIG_MPC8XXX_SPI +#define CONFIG_CMD_SPI +#define CONFIG_USE_SPIFLASH +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#endif /* * Board info - revision and where boot from |