diff options
author | Scott McNutt <smcnutt@psyent.com> | 2010-03-30 20:23:04 -0400 |
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committer | Scott McNutt <smcnutt@psyent.com> | 2010-04-02 12:28:41 -0400 |
commit | 3a89a91a10fed545af458418e63d911953a9849c (patch) | |
tree | dbb8cf6ce9e3ca0b1d86b815edcc290e25b2f3e3 /include/configs/PCI5441.h | |
parent | 3ea0037f2337de692b5fd2b6a4449db1de3067a2 (diff) |
nios2: Set CONFIG_SYS_HZ to 1000 all nios2 boards.
CONFIG_SYS_HZ was being calculated (incorrectly) in nios2 configuration
headers. Updated comments to accurately describe timebase macros.
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
Diffstat (limited to 'include/configs/PCI5441.h')
-rw-r--r-- | include/configs/PCI5441.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h index d06b7f82749..c60a9f7bc72 100644 --- a/include/configs/PCI5441.h +++ b/include/configs/PCI5441.h @@ -114,14 +114,16 @@ * TIMEBASE -- * * The high res timer defaults to 1 msec. Since it includes the period - * registers, we can slow it down to 10 msec using TMRCNT. If the default - * period is acceptable, TMRCNT can be left undefined. + * registers, the interrupt frequency can be reduced using TMRCNT. + * If the default period is acceptable, TMRCNT can be left undefined. + * TMRMS represents the desired mecs per tick (msecs per interrupt). *----------------------------------------------------------------------*/ +#define CONFIG_SYS_HZ 1000 /* Always 1000 */ #define CONFIG_SYS_NIOS_TMRBASE 0x00920860 /* Tick timer base addr */ -#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ -#define CONFIG_SYS_NIOS_TMRMS 10 /* 10 msec per tick */ -#define CONFIG_SYS_NIOS_TMRCNT (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) -#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ/(CONFIG_SYS_NIOS_TMRCNT + 1)) +#define CONFIG_SYS_NIOS_TMRIRQ 3 /* Timer IRQ num */ +#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ +#define CONFIG_SYS_NIOS_TMRCNT \ + (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000)) /* |