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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-08-08 08:20:44 +0200
committerStefan Agner <stefan.agner@toradex.com>2017-08-31 19:57:37 -0700
commitf614927a9121366144868802c5ec0ca3ade7a945 (patch)
tree6ff02dd54cc4e807ede6787503a6f84b51eb49b2 /include/configs/apalis_t30.h
parent6bd111a8dc93ba7a292b9d4756d338f099f289d8 (diff)
apalis_t30: fix optional pcie port reset for reliable pcie operation
Allow optionally bringing up the Apalis type specific 4 lane PCIe port as well as the PCIe switch as found on the Apalis Evaluation board. In order to avoid violating the PCIe reset timing do this by overriding the tegra_pcie_board_port_reset() function. Note however that both the Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe port are also left disabled in the device tree by default. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'include/configs/apalis_t30.h')
-rw-r--r--include/configs/apalis_t30.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h
index ba4ffb70bec..0e96da13aa3 100644
--- a/include/configs/apalis_t30.h
+++ b/include/configs/apalis_t30.h
@@ -57,7 +57,6 @@
/* PCI host support */
#undef CONFIG_PCI_SCAN_SHOW
#define CONFIG_CMD_PCI
-#undef APALIS_T30_PCIE_EVALBOARD_INIT
/* PCI networking support */
#define CONFIG_E1000_NO_NVM