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authorYuan Yao <yao.yuan@nxp.com>2016-06-08 18:24:57 +0800
committerYork Sun <york.sun@nxp.com>2016-06-10 13:45:00 -0700
commit453418f2d2df33f370754582b7e21d2513e2ee28 (patch)
treeeaabfae1d46c54df5b1ba7b402c2e77807c4e164 /include/configs/ls2080aqds.h
parent95ab851de0de317e07a843d23bfaeb89d94575f8 (diff)
armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot
Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls2080aqds.h')
-rw-r--r--include/configs/ls2080aqds.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index b15acf39001..9741be1b7b7 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -303,6 +303,12 @@ unsigned long get_board_ddr_clk(void);
#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */
#define FSL_QSPI_FLASH_NUM 4
#endif
+/*
+ * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
+ * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
+ * If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
+ */
+#define FSL_QIXIS_BRDCFG9_QSPI 0x1
#endif