diff options
| author | Wolfgang Denk <wd@denx.de> | 2010-05-04 22:49:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-05-04 22:49:15 +0200 |
| commit | 900a1fe8c8c7acda1d8903af02c2d0d993b770d8 (patch) | |
| tree | b17bb283aa7fe7b31f46fbdfd3496b7f23736840 /include/configs/qong.h | |
| parent | 4185ae7a7146a77a792e5ba49845e5ca6e95b038 (diff) | |
| parent | 20d98c2cea3398ad93beccd4727a371f41514086 (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'include/configs/qong.h')
| -rw-r--r-- | include/configs/qong.h | 40 |
1 files changed, 36 insertions, 4 deletions
diff --git a/include/configs/qong.h b/include/configs/qong.h index 61acb04f30..1d63b33b9b 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -41,7 +41,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -52,6 +52,8 @@ #define CONFIG_MXC_UART 1 #define CONFIG_SYS_MX31_UART1 1 +#define CONFIG_MX31_GPIO + /* FPGA */ #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) @@ -95,7 +97,7 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NET #define CONFIG_CMD_MII -#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_NAND /* * You can compile in a MAC address and your custom net settings by using @@ -192,6 +194,30 @@ #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ +/* + * NAND driver + */ + +#ifndef __ASSEMBLY__ +extern void qong_nand_plat_init(void *chip); +extern int qong_nand_rdy(void *chip); +#endif +#define CONFIG_NAND_PLAT +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE CS3_BASE +#define NAND_PLAT_INIT() qong_nand_plat_init(nand) + +#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24)) +#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23)) +#define QONG_NAND_WRITE(addr, cmd) \ + do { \ + __REG8(addr) = cmd; \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd) +#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip)) + /*----------------------------------------------------------------------- * FLASH and environment organization */ @@ -206,7 +232,7 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) @@ -225,9 +251,15 @@ #define CONFIG_SYS_FLASH_PROTECTION 1 /* - * JFFS2 partitions + * Filesystem */ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nor0=physmap-flash.0" |