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author | Rajesh Bhagat <rajesh.bhagat@nxp.com> | 2019-02-01 05:22:01 +0000 |
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committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-03-03 20:56:01 +0530 |
commit | 32413125b3486c2376d5df6791f1329268725bc9 (patch) | |
tree | 0d806dc5476d6cadece8e4a593ab9a3624b98bdc /include/configs/sbc8548.h | |
parent | 31a1c951efd205ece47c963a282c13aa74d6e388 (diff) |
configs: fsl: move DDR specific defines to Kconfig
Moves below DDR specific defines to Kconfig:
CONFIG_FSL_DDR_BIST
CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
CONFIG_FSL_DDR_INTERACTIVE
CONFIG_FSL_DDR_SYNC_REFRESH
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'include/configs/sbc8548.h')
-rw-r--r-- | include/configs/sbc8548.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index f0b165591c..9df8604af7 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -83,7 +83,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR /* DDR Setup */ -#undef CONFIG_FSL_DDR_INTERACTIVE #undef CONFIG_DDR_ECC /* only for ECC DDR module */ /* * A hardware errata caused the LBC SDRAM SPD and the DDR2 SPD |