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authorYork Sun <yorksun@freescale.com>2012-12-19 17:23:05 +0000
committerAndy Fleming <afleming@freescale.com>2013-01-30 11:25:09 -0600
commit9730b7bc11580a7fd7bdabbd76224eb1cc14d42a (patch)
treee4619a514917800c0c96c18e974d210bc9cf4563 /include/configs/t4qds.h
parent9427ba5c279700640419605afb61a13838ba5268 (diff)
powerpc/t4240qds: Update IFC timing for NOR flash
Relax parameters to give address latching more time to setup. Tighten parameters to make it overall faster. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/t4qds.h')
-rw-r--r--include/configs/t4qds.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index d93e0263f95..2c665b8a9dd 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -213,14 +213,14 @@ unsigned long get_board_ddr_clk(void);
/* NOR Flash Timing Params */
#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80
-#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x01) | \
- FTIM0_NOR_TEADC(0x01) | \
- FTIM0_NOR_TEAHC(0x20))
+#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \
+ FTIM0_NOR_TEADC(0x5) | \
+ FTIM0_NOR_TEAHC(0x5))
#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \
FTIM1_NOR_TRAD_NOR(0x1A) |\
FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x01) | \
- FTIM2_NOR_TCH(0x0E) | \
+#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \
+ FTIM2_NOR_TCH(0x4) | \
FTIM2_NOR_TWPH(0x0E) | \
FTIM2_NOR_TWP(0x1c))
#define CONFIG_SYS_NOR_FTIM3 0x0