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authorGabriel Huau <contact@huau-gabriel.fr>2015-05-25 22:27:37 -0700
committerSimon Glass <sjg@chromium.org>2015-06-04 03:32:08 -0600
commit5318f18d2c002f505054b90bb95ba7c53532eedf (patch)
treec9e25f8c9fc57dbeba19b617f421b6f1ba7ca8d1 /include/dt-bindings
parentafbbd413a3ef8a45155fcd083814ba645b09fcc7 (diff)
x86: gpio: add pinctrl support from the device tree
Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/gpio/x86-gpio.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/include/dt-bindings/gpio/x86-gpio.h b/include/dt-bindings/gpio/x86-gpio.h
new file mode 100644
index 00000000000..7f1de30c0bf
--- /dev/null
+++ b/include/dt-bindings/gpio/x86-gpio.h
@@ -0,0 +1,31 @@
+/*
+ * This header provides constants for binding intel,x86-pinctrl.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_X86_GPIO_H
+#define _DT_BINDINGS_GPIO_X86_GPIO_H
+
+#include <dt-bindings/gpio/gpio.h>
+
+#define GPIO_MODE_NATIVE 0
+#define GPIO_MODE_GPIO 1
+
+#define GPIO_MODE_FUNC0 0
+#define GPIO_MODE_FUNC1 1
+#define GPIO_MODE_FUNC2 2
+#define GPIO_MODE_FUNC3 3
+#define GPIO_MODE_FUNC4 4
+#define GPIO_MODE_FUNC5 5
+#define GPIO_MODE_FUNC6 6
+
+#define PIN_INPUT 0
+#define PIN_OUTPUT 1
+
+#define PIN_INPUT_NOPULL 0
+#define PIN_INPUT_PULLUP 1
+#define PIN_INPUT_PULLDOWN 2
+
+#define PULL_STR_2K 0
+#define PULL_STR_20K 2
+
+#endif