diff options
| author | Stefan Roese <sr@denx.de> | 2007-10-31 17:55:58 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:46 +0100 |
| commit | 9b94ac61d2176185c30adf0793e079ec30e68687 (patch) | |
| tree | f51a4467a3daffa8b5597eb9d783c944692f7d80 /include/ppc440.h | |
| parent | 06713773da4ac3d390c63d82641eb553224b27c2 (diff) | |
ppc4xx: Rework 4xx cache support
New cache handling functions added and all existing functions
moved from start.S into seperate cache.S.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc440.h')
| -rw-r--r-- | include/ppc440.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/include/ppc440.h b/include/ppc440.h index dc5eb98c909..2f841fa6bc6 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -22,6 +22,8 @@ #ifndef __PPC440_H__ #define __PPC440_H__ +#define CFG_DCACHE_SIZE (32 << 10) /* For AMCC 440 CPUs */ + /*--------------------------------------------------------------------- */ /* Special Purpose Registers */ /*--------------------------------------------------------------------- */ @@ -3282,8 +3284,4 @@ static inline void set_mcsr(u32 val) #endif /* _ASMLANGUAGE */ -#define RESET_VECTOR 0xfffffffc -#define CACHELINE_MASK (CFG_CACHELINE_SIZE - 1) /* Address mask for */ - /* cache line aligned data. */ - #endif /* __PPC440_H__ */ |