* Header file cleanup for ARMLABEL_2003_06_26_2220

* Patch by Murray Jensen, 24 Jun 2003:
  - make sure to use only U-boot provided header files
  - fix problems with ".rodata.str1.4" section as used by GCC-3.x

15 files changed, 1363 insertions, 296 deletions

diff --git a/include/asm-arm/arch-arm920t/memory.h b/include/asm-arm/arch-arm920t/memory.h
new file mode 100644
index 00000000000..8a4e3f8716a
--- /dev/null
+++ b/include/asm-arm/arch-arm920t/memory.h
@@ -0,0 +1,162 @@
+/*
+ * linux/include/asm-arm/arch-s3c2400/memory.h by gj@denx.de
+ * based on
+ * linux/include/asm-arm/arch-sa1100/memory.h
+ *
+ * Copyright (c) 1999 Nicolas Pitre <nico@visuaide.com>
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+
+/*
+ * Task size: 3GB
+ */
+#define TASK_SIZE       (0xc0000000UL)
+#define TASK_SIZE_26	(0x04000000UL)
+
+/*
+ * This decides where the kernel will search for a free chunk of vm
+ * space during mmap's.
+ */
+#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
+
+/*
+ * Page offset: 3GB
+ */
+#define PAGE_OFFSET     (0xc0000000UL)
+
+/*
+ * Physical DRAM offset is 0x0c000000 on the S3C2400
+ */
+#define PHYS_OFFSET	(0x0c000000UL)
+
+#include <linux/config.h>
+
+
+/* Modified for S3C2400, by chc, 20010509 */
+#define RAM_IN_BANK_0  32*1024*1024
+#define RAM_IN_BANK_1  0
+#define RAM_IN_BANK_2  0
+#define RAM_IN_BANK_3  0
+
+#define MEM_SIZE  (RAM_IN_BANK_0+RAM_IN_BANK_1+RAM_IN_BANK_2+RAM_IN_BANK_3)
+
+
+/* translation macros */
+#define __virt_to_phys__is_a_macro
+#define __phys_to_virt__is_a_macro
+
+#if (RAM_IN_BANK_1 + RAM_IN_BANK_2 + RAM_IN_BANK_3 == 0)
+
+#define __virt_to_phys(x) ( (x) - PAGE_OFFSET + 0x0c000000 )
+#define __phys_to_virt(x) ( (x) - 0x0c000000 + PAGE_OFFSET )
+
+#elif (RAM_IN_BANK_0 == RAM_IN_BANK_1) && \
+      (RAM_IN_BANK_2 + RAM_IN_BANK_3 == 0)
+
+/* Two identical banks */
+#define __virt_to_phys(x) \
+	  ( ((x) < PAGE_OFFSET+RAM_IN_BANK_0) ? \
+	    ((x) - PAGE_OFFSET + _DRAMBnk0) : \
+	    ((x) - PAGE_OFFSET - RAM_IN_BANK_0 + _DRAMBnk1) )
+#define __phys_to_virt(x) \
+	  ( ((x)&0x07ffffff) + \
+	    (((x)&0x08000000) ? PAGE_OFFSET+RAM_IN_BANK_0 : PAGE_OFFSET) )
+#else
+
+/* It's more efficient for all other cases to use the function call */
+#undef __virt_to_phys__is_a_macro
+#undef __phys_to_virt__is_a_macro
+extern unsigned long __virt_to_phys(unsigned long vpage);
+extern unsigned long __phys_to_virt(unsigned long ppage);
+
+#endif
+
+/*
+ * Virtual view <-> DMA view memory address translations
+ * virt_to_bus: Used to translate the virtual address to an
+ *              address suitable to be passed to set_dma_addr
+ * bus_to_virt: Used to convert an address for DMA operations
+ *              to an address that the kernel can use.
+ *
+ * On the SA1100, bus addresses are equivalent to physical addresses.
+ */
+#define __virt_to_bus__is_a_macro
+#define __virt_to_bus(x)        __virt_to_phys(x)
+#define __bus_to_virt__is_a_macro
+#define __bus_to_virt(x)        __phys_to_virt(x)
+
+
+#ifdef CONFIG_DISCONTIGMEM
+#error "CONFIG_DISCONTIGMEM will not work on S3C2400"
+/*
+ * Because of the wide memory address space between physical RAM banks on the 
+ * SA1100, it's much more convenient to use Linux's NUMA support to implement
+ * our memory map representation.  Assuming all memory nodes have equal access 
+ * characteristics, we then have generic discontiguous memory support.
+ *
+ * Of course, all this isn't mandatory for SA1100 implementations with only
+ * one used memory bank.  For those, simply undefine CONFIG_DISCONTIGMEM.
+ *
+ * The nodes are matched with the physical memory bank addresses which are 
+ * incidentally the same as virtual addresses.
+ * 
+ * 	node 0:  0xc0000000 - 0xc7ffffff
+ * 	node 1:  0xc8000000 - 0xcfffffff
+ * 	node 2:  0xd0000000 - 0xd7ffffff
+ * 	node 3:  0xd8000000 - 0xdfffffff
+ */
+
+#define NR_NODES	4
+
+/*
+ * Given a kernel address, find the home node of the underlying memory.
+ */
+#define KVADDR_TO_NID(addr) \
+		(((unsigned long)(addr) - 0xc0000000) >> 27)
+
+/*
+ * Given a physical address, convert it to a node id.
+ */
+#define PHYS_TO_NID(addr) KVADDR_TO_NID(__phys_to_virt(addr))
+
+/*
+ * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
+ * and returns the mem_map of that node.
+ */
+#define ADDR_TO_MAPBASE(kaddr) \
+			NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
+
+/*
+ * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
+ * and returns the index corresponding to the appropriate page in the
+ * node's mem_map.
+ */
+#define LOCAL_MAP_NR(kvaddr) \
+	(((unsigned long)(kvaddr) & 0x07ffffff) >> PAGE_SHIFT)
+
+/*
+ * Given a kaddr, virt_to_page returns a pointer to the corresponding 
+ * mem_map entry.
+ */
+#define virt_to_page(kaddr) \
+	(ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
+
+/*
+ * VALID_PAGE returns a non-zero value if given page pointer is valid.
+ * This assumes all node's mem_maps are stored within the node they refer to.
+ */
+#define VALID_PAGE(page) \
+({ unsigned int node = KVADDR_TO_NID(page); \
+   ( (node < NR_NODES) && \
+     ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size) ); \
+})
+
+#else
+
+#define PHYS_TO_NID(addr)	(0)
+
+#endif
+#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/include/asm-arm/arch-sa1100/bitfield.h b/include/asm-arm/arch-sa1100/bitfield.h
new file mode 100644
index 00000000000..f1f0e3387d9
--- /dev/null
+++ b/include/asm-arm/arch-sa1100/bitfield.h
@@ -0,0 +1,113 @@
+/*
+ *	FILE    	bitfield.h
+ *
+ *	Version 	1.1
+ *	Author  	Copyright (c) Marc A. Viredaz, 1998
+ *	        	DEC Western Research Laboratory, Palo Alto, CA
+ *	Date    	April 1998 (April 1997)
+ *	System  	Advanced RISC Machine (ARM)
+ *	Language	C or ARM Assembly
+ *	Purpose 	Definition of macros to operate on bit fields.
+ */
+
+
+
+#ifndef __BITFIELD_H
+#define __BITFIELD_H
+
+#ifndef __ASSEMBLY__
+#define UData(Data)	((unsigned long) (Data))
+#else
+#define UData(Data)	(Data)
+#endif
+
+
+/*
+ * MACRO: Fld
+ *
+ * Purpose
+ *    The macro "Fld" encodes a bit field, given its size and its shift value
+ *    with respect to bit 0.
+ *
+ * Note
+ *    A more intuitive way to encode bit fields would have been to use their
+ *    mask. However, extracting size and shift value information from a bit
+ *    field's mask is cumbersome and might break the assembler (255-character
+ *    line-size limit).
+ *
+ * Input
+ *    Size      	Size of the bit field, in number of bits.
+ *    Shft      	Shift value of the bit field with respect to bit 0.
+ *
+ * Output
+ *    Fld       	Encoded bit field.
+ */
+
+#define Fld(Size, Shft)	(((Size) << 16) + (Shft))
+
+
+/*
+ * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit
+ *
+ * Purpose
+ *    The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return
+ *    the size, shift value, mask, aligned mask, and first bit of a
+ *    bit field.
+ *
+ * Input
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FSize     	Size of the bit field, in number of bits.
+ *    FShft     	Shift value of the bit field with respect to bit 0.
+ *    FMsk      	Mask for the bit field.
+ *    FAlnMsk   	Mask for the bit field, aligned on bit 0.
+ *    F1stBit   	First bit of the bit field.
+ */
+
+#define FSize(Field)	((Field) >> 16)
+#define FShft(Field)	((Field) & 0x0000FFFF)
+#define FMsk(Field)	(((UData (1) << FSize (Field)) - 1) << FShft (Field))
+#define FAlnMsk(Field)	((UData (1) << FSize (Field)) - 1)
+#define F1stBit(Field)	(UData (1) << FShft (Field))
+
+
+/*
+ * MACRO: FInsrt
+ *
+ * Purpose
+ *    The macro "FInsrt" inserts a value into a bit field by shifting the
+ *    former appropriately.
+ *
+ * Input
+ *    Value     	Bit-field value.
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FInsrt    	Bit-field value positioned appropriately.
+ */
+
+#define FInsrt(Value, Field) \
+                	(UData (Value) << FShft (Field))
+
+
+/*
+ * MACRO: FExtr
+ *
+ * Purpose
+ *    The macro "FExtr" extracts the value of a bit field by masking and
+ *    shifting it appropriately.
+ *
+ * Input
+ *    Data      	Data containing the bit-field to be extracted.
+ *    Field     	Encoded bit field (using the macro "Fld").
+ *
+ * Output
+ *    FExtr     	Bit-field value.
+ */
+
+#define FExtr(Data, Field) \
+                	((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
+
+
+#endif /* __BITFIELD_H */
diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h
new file mode 100644
index 00000000000..ba9e4b72d82
--- /dev/null
+++ b/include/asm-arm/atomic.h
@@ -0,0 +1,113 @@
+/*
+ *  linux/include/asm-arm/atomic.h
+ *
+ *  Copyright (c) 1996 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   27-06-1996	RMK	Created
+ *   13-04-1997	RMK	Made functions atomic!
+ *   07-12-1997	RMK	Upgraded for v2.1.
+ *   26-08-1998	PJB	Added #ifdef __KERNEL__
+ */
+#ifndef __ASM_ARM_ATOMIC_H
+#define __ASM_ARM_ATOMIC_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i)	{ (i) }
+
+#ifdef __KERNEL__
+#include <asm/proc/system.h>
+
+#define atomic_read(v)	((v)->counter)
+#define atomic_set(v,i)	(((v)->counter) = (i))
+
+static inline void atomic_add(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	v->counter += i;
+	local_irq_restore(flags);
+}
+
+static inline void atomic_sub(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	v->counter -= i;
+	local_irq_restore(flags);
+}
+
+static inline void atomic_inc(volatile atomic_t *v)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	v->counter += 1;
+	local_irq_restore(flags);
+}
+
+static inline void atomic_dec(volatile atomic_t *v)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	v->counter -= 1;
+	local_irq_restore(flags);
+}
+
+static inline int atomic_dec_and_test(volatile atomic_t *v)
+{
+	unsigned long flags;
+	int val;
+
+	local_irq_save(flags);
+	val = v->counter;
+	v->counter = val -= 1;
+	local_irq_restore(flags);
+
+	return val == 0;
+}
+
+static inline int atomic_add_negative(int i, volatile atomic_t *v)
+{
+	unsigned long flags;
+	int val;
+
+	local_irq_save(flags);
+	val = v->counter;
+	v->counter = val += i;
+	local_irq_restore(flags);
+
+	return val < 0;
+}
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+	*addr &= ~mask;
+	local_irq_restore(flags);
+}
+
+/* Atomic operations are already serializing on ARM */
+#define smp_mb__before_atomic_dec()	barrier()
+#define smp_mb__after_atomic_dec()	barrier()
+#define smp_mb__before_atomic_inc()	barrier()
+#define smp_mb__after_atomic_inc()	barrier()
+
+#endif
+#endif
diff --git a/include/asm-arm/hardware.h b/include/asm-arm/hardware.h
new file mode 100644
index 00000000000..1fd1a5b6504
--- /dev/null
+++ b/include/asm-arm/hardware.h
@@ -0,0 +1,18 @@
+/*
+ *  linux/include/asm-arm/hardware.h
+ *
+ *  Copyright (C) 1996 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Common hardware definitions
+ */
+
+#ifndef __ASM_HARDWARE_H
+#define __ASM_HARDWARE_H
+
+#include <asm/arch/hardware.h>
+
+#endif
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 122419f1e6b..0f38e10d2d8 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -20,10 +20,14 @@
 #ifndef __ASM_ARM_IO_H
 #define __ASM_ARM_IO_H
 
+#ifdef __KERNEL__
+
 #include <linux/types.h>
 #include <asm/byteorder.h>
 #include <asm/memory.h>
+#if 0	/* XXX###XXX */
 #include <asm/arch/hardware.h>
+#endif	/* XXX###XXX */
 
 /*
  * Generic virtual read/write.  Note that we don't support half-word
@@ -68,7 +72,9 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen);
 /*
  * Now, pick up the machine-defined IO definitions
  */
+#if 0	/* XXX###XXX */
 #include <asm/arch/io.h>
+#endif	/* XXX###XXX */
 
 /*
  *  IO port access primitives
@@ -252,10 +258,6 @@ out:
 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 				eth_copy_and_sum((a),__mem_isa(b),(c),(d))
 
-#ifndef PCI_MEMORY_VADDR	/* XXX problem not understood -- wd */
-#define	PCI_MEMORY_VADDR	0
-#endif	/* XXX */
-
 static inline int
 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
 		    int length)
@@ -291,5 +293,5 @@ out:
 #define isa_check_signature(io,sig,len)	(0)
 
 #endif	/* __mem_isa */
-
+#endif	/* __KERNEL__ */
 #endif	/* __ASM_ARM_IO_H */
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
new file mode 100644
index 00000000000..c3b2afd9077
--- /dev/null
+++ b/include/asm-arm/memory.h
@@ -0,0 +1,137 @@
+/*
+ *  linux/include/asm-arm/memory.h
+ *
+ *  Copyright (C) 2000-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Note: this file should not be included by non-asm/.h files
+ */
+#ifndef __ASM_ARM_MEMORY_H
+#define __ASM_ARM_MEMORY_H
+
+#if 0	/* XXX###XXX */
+
+#include <linux/config.h>
+#include <asm/arch/memory.h>
+
+/*
+ * PFNs are used to describe any physical page; this means
+ * PFN 0 == physical address 0.
+ *
+ * This is the PFN of the first RAM page in the kernel
+ * direct-mapped view.  We assume this is the first page
+ * of RAM in the mem_map as well.
+ */
+#define PHYS_PFN_OFFSET	(PHYS_OFFSET >> PAGE_SHIFT)
+
+/*
+ * These are *only* valid on the kernel direct mapped RAM memory.
+ */
+static inline unsigned long virt_to_phys(void *x)
+{
+	return __virt_to_phys((unsigned long)(x));
+}
+
+static inline void *phys_to_virt(unsigned long x)
+{
+	return (void *)(__phys_to_virt((unsigned long)(x)));
+}
+
+#define __pa(x)			__virt_to_phys((unsigned long)(x))
+#define __va(x)			((void *)__phys_to_virt((unsigned long)(x)))
+
+/*
+ * Virtual <-> DMA view memory address translations
+ * Again, these are *only* valid on the kernel direct mapped RAM
+ * memory.  Use of these is *depreciated*.
+ */
+#define virt_to_bus(x)		(__virt_to_bus((unsigned long)(x)))
+#define bus_to_virt(x)		((void *)(__bus_to_virt((unsigned long)(x))))
+
+/*
+ * Conversion between a struct page and a physical address.
+ *
+ * Note: when converting an unknown physical address to a
+ * struct page, the resulting pointer must be validated
+ * using VALID_PAGE().  It must return an invalid struct page
+ * for any physical address not corresponding to a system
+ * RAM address.
+ *
+ *  page_to_pfn(page)	convert a struct page * to a PFN number
+ *  pfn_to_page(pfn)	convert a _valid_ PFN number to struct page *
+ *  pfn_valid(pfn)	indicates whether a PFN number is valid
+ *
+ *  virt_to_page(k)	convert a _valid_ virtual address to struct page *
+ *  virt_addr_valid(k)	indicates whether a virtual address is valid
+ */
+#ifndef CONFIG_DISCONTIGMEM
+
+#define page_to_pfn(page)	(((page) - mem_map) + PHYS_PFN_OFFSET)
+#define pfn_to_page(pfn)	((mem_map + (pfn)) - PHYS_PFN_OFFSET)
+#define pfn_valid(pfn)		((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
+
+#define virt_to_page(kaddr)	(pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
+#define virt_addr_valid(kaddr)	((kaddr) >= PAGE_OFFSET && (kaddr) < (unsigned long)high_memory)
+
+#define PHYS_TO_NID(addr)	(0)
+
+#define VALID_PAGE(page)	((page - mem_map) < max_mapnr)
+
+#else
+
+/*
+ * This is more complex.  We have a set of mem_map arrays spread
+ * around in memory.
+ */
+#define page_to_pfn(page)					\
+	(((page) - page_zone(page)->zone_mem_map)		\
+	  + (page_zone(page)->zone_start_paddr >> PAGE_SHIFT))
+
+#define pfn_to_page(pfn)					\
+	(PFN_TO_MAPBASE(pfn) + LOCAL_MAP_NR((pfn) << PAGE_SHIFT))
+
+#define pfn_valid(pfn)						\
+  ({								\
+	unsigned int node = PFN_TO_NID(pfn);			\
+	struct pglist_data *nd = NODE_DATA(node);		\
+	((node < NR_NODES) &&					\
+	 ((pfn - (nd->node_start_paddr >> PAGE_SHIFT)) < nd->node_size));\
+   })
+
+#define virt_to_page(kaddr)					\
+	(ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
+
+#define virt_addr_valid(kaddr)	(KVADDR_TO_NID(kaddr) < NR_NODES)
+
+/*
+ * Common discontigmem stuff.
+ *  PHYS_TO_NID is used by the ARM kernel/setup.c
+ */
+#define PHYS_TO_NID(addr)	PFN_TO_NID((addr) >> PAGE_SHIFT)
+
+/*
+ * 2.4 compatibility
+ *
+ * VALID_PAGE returns a non-zero value if given page pointer is valid.
+ * This assumes all node's mem_maps are stored within the node they
+ * refer to.  This is actually inherently buggy.
+ */
+#define VALID_PAGE(page) \
+({ unsigned int node = KVADDR_TO_NID(page); \
+   ((node < NR_NODES) && \
+     ((unsigned)((page) - NODE_MEM_MAP(node)) < NODE_DATA(node)->node_size)); \
+})
+
+#endif
+
+/*
+ * We should really eliminate virt_to_bus() here - it's depreciated.
+ */
+#define page_to_bus(page)	(virt_to_bus(page_address(page)))
+
+#endif	/* XXX###XXX */
+
+#endif	/* __ASM_ARM_MEMORY_H */
diff --git a/include/asm-arm/proc-armv/domain.h b/include/asm-arm/proc-armv/domain.h
new file mode 100644
index 00000000000..aadc83187d6
--- /dev/null
+++ b/include/asm-arm/proc-armv/domain.h
@@ -0,0 +1,50 @@
+/*
+ *  linux/include/asm-arm/proc-armv/domain.h
+ *
+ *  Copyright (C) 1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_PROC_DOMAIN_H
+#define __ASM_PROC_DOMAIN_H
+
+/*
+ * Domain numbers
+ *
+ *  DOMAIN_IO     - domain 2 includes all IO only
+ *  DOMAIN_KERNEL - domain 1 includes all kernel memory only
+ *  DOMAIN_USER   - domain 0 includes all user memory only
+ */
+#define DOMAIN_USER	0
+#define DOMAIN_KERNEL	1
+#define DOMAIN_TABLE	1
+#define DOMAIN_IO	2
+
+/*
+ * Domain types
+ */
+#define DOMAIN_NOACCESS	0
+#define DOMAIN_CLIENT	1
+#define DOMAIN_MANAGER	3
+
+#define domain_val(dom,type)	((type) << 2*(dom))
+
+#define set_domain(x)					\
+	do {						\
+	__asm__ __volatile__(				\
+	"mcr	p15, 0, %0, c3, c0	@ set domain"	\
+	  : : "r" (x));					\
+	} while (0)
+
+#define modify_domain(dom,type)				\
+	do {						\
+	unsigned int domain = current->thread.domain;	\
+	domain &= ~domain_val(dom, DOMAIN_MANAGER);	\
+	domain |= domain_val(dom, type);		\
+	current->thread.domain = domain;		\
+	set_domain(current->thread.domain);		\
+	} while (0)
+
+#endif
diff --git a/include/asm-arm/proc-armv/processor.h b/include/asm-arm/proc-armv/processor.h
new file mode 100644
index 00000000000..5bfab7fb905
--- /dev/null
+++ b/include/asm-arm/proc-armv/processor.h
@@ -0,0 +1,74 @@
+/*
+ *  linux/include/asm-arm/proc-armv/processor.h
+ *
+ *  Copyright (C) 1996-1999 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Changelog:
+ *   20-09-1996	RMK	Created
+ *   26-09-1996	RMK	Added 'EXTRA_THREAD_STRUCT*'
+ *   28-09-1996	RMK	Moved start_thread into the processor dependencies
+ *   09-09-1998	PJB	Delete redundant `wp_works_ok'
+ *   30-05-1999	PJB	Save sl across context switches
+ *   31-07-1999	RMK	Added 'domain' stuff
+ */
+#ifndef __ASM_PROC_PROCESSOR_H
+#define __ASM_PROC_PROCESSOR_H
+
+#include <asm/proc/domain.h>
+
+#define KERNEL_STACK_SIZE	PAGE_SIZE
+
+struct context_save_struct {
+	unsigned long cpsr;
+	unsigned long r4;
+	unsigned long r5;
+	unsigned long r6;
+	unsigned long r7;
+	unsigned long r8;
+	unsigned long r9;
+	unsigned long sl;
+	unsigned long fp;
+	unsigned long pc;
+};
+
+#define INIT_CSS (struct context_save_struct){ SVC_MODE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
+
+#define EXTRA_THREAD_STRUCT						\
+	unsigned int	domain;
+
+#define EXTRA_THREAD_STRUCT_INIT					\
+	domain:	  domain_val(DOMAIN_USER, DOMAIN_CLIENT) |		\
+		  domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) |		\
+		  domain_val(DOMAIN_IO, DOMAIN_CLIENT)
+
+#define start_thread(regs,pc,sp)					\
+({									\
+	unsigned long *stack = (unsigned long *)sp;			\
+	set_fs(USER_DS);						\
+	memzero(regs->uregs, sizeof(regs->uregs));			\
+	if (current->personality & ADDR_LIMIT_32BIT)			\
+		regs->ARM_cpsr = USR_MODE;				\
+	else								\
+		regs->ARM_cpsr = USR26_MODE;				\
+	regs->ARM_pc = pc;		/* pc */			\
+	regs->ARM_sp = sp;		/* sp */			\
+	regs->ARM_r2 = stack[2];	/* r2 (envp) */			\
+	regs->ARM_r1 = stack[1];	/* r1 (argv) */			\
+	regs->ARM_r0 = stack[0];	/* r0 (argc) */			\
+})
+
+#define KSTK_EIP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1019])
+#define KSTK_ESP(tsk)	(((unsigned long *)(4096+(unsigned long)(tsk)))[1017])
+
+/* Allocation and freeing of basic task resources. */
+/*
+ * NOTE! The task struct and the stack go together
+ */
+#define ll_alloc_task_struct() ((struct task_struct *) __get_free_pages(GFP_KERNEL,1))
+#define ll_free_task_struct(p) free_pages((unsigned long)(p),1)
+
+#endif
diff --git a/include/asm-arm/proc-armv/ptrace.h b/include/asm-arm/proc-armv/ptrace.h
index b32edfc680c..51708b9b1ac 100644
--- a/include/asm-arm/proc-armv/ptrace.h
+++ b/include/asm-arm/proc-armv/ptrace.h
@@ -61,8 +61,6 @@ struct pt_regs {
 #define ARM_r0		uregs[0]
 #define ARM_ORIG_r0	uregs[17]
 
-#define instruction_pointer(regs)	((regs)->ARM_ip)
-
 #ifdef __KERNEL__
 
 #define user_mode(regs)	\
diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h
new file mode 100644
index 00000000000..479f5532085
--- /dev/null
+++ b/include/asm-arm/proc-armv/system.h
@@ -0,0 +1,199 @@
+/*
+ *  linux/include/asm-arm/proc-armv/system.h
+ *
+ *  Copyright (C) 1996 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_PROC_SYSTEM_H
+#define __ASM_PROC_SYSTEM_H
+
+#include <linux/config.h>
+
+#define set_cr(x)					\
+	__asm__ __volatile__(				\
+	"mcr	p15, 0, %0, c1, c0	@ set CR"	\
+	: : "r" (x))
+
+#define CR_M	(1 << 0)	/* MMU enable				*/
+#define CR_A	(1 << 1)	/* Alignment abort enable		*/
+#define CR_C	(1 << 2)	/* Dcache enable			*/
+#define CR_W	(1 << 3)	/* Write buffer enable			*/
+#define CR_P	(1 << 4)	/* 32-bit exception handler		*/
+#define CR_D	(1 << 5)	/* 32-bit data address range		*/
+#define CR_L	(1 << 6)	/* Implementation defined		*/
+#define CD_B	(1 << 7)	/* Big endian				*/
+#define CR_S	(1 << 8)	/* System MMU protection		*/
+#define CD_R	(1 << 9)	/* ROM MMU protection			*/
+#define CR_F	(1 << 10)	/* Implementation defined		*/
+#define CR_Z	(1 << 11)	/* Implementation defined		*/
+#define CR_I	(1 << 12)	/* Icache enable			*/
+#define CR_V	(1 << 13)	/* Vectors relocated to 0xffff0000	*/
+#define CR_RR	(1 << 14)	/* Round Robin cache replacement	*/
+
+extern unsigned long cr_no_alignment;	/* defined in entry-armv.S */
+extern unsigned long cr_alignment;	/* defined in entry-armv.S */
+
+#if __LINUX_ARM_ARCH__ >= 4
+#define vectors_base()	((cr_alignment & CR_V) ? 0xffff0000 : 0)
+#else
+#define vectors_base()	(0)
+#endif
+
+/*
+ * Save the current interrupt enable state & disable IRQs
+ */
+#define local_irq_save(x)					\
+	({							\
+		unsigned long temp;				\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ local_irq_save\n"	\
+"	orr	%1, %0, #128\n"					\
+"	msr	cpsr_c, %1"					\
+	: "=r" (x), "=r" (temp)					\
+	:							\
+	: "memory");						\
+	})
+	
+/*
+ * Enable IRQs
+ */
+#define local_irq_enable()					\
+	({							\
+		unsigned long temp;				\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ local_irq_enable\n"	\
+"	bic	%0, %0, #128\n"					\
+"	msr	cpsr_c, %0"					\
+	: "=r" (temp)						\
+	:							\
+	: "memory");						\
+	})
+
+/*
+ * Disable IRQs
+ */
+#define local_irq_disable()					\
+	({							\
+		unsigned long temp;				\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ local_irq_disable\n"	\
+"	orr	%0, %0, #128\n"					\
+"	msr	cpsr_c, %0"					\
+	: "=r" (temp)						\
+	:							\
+	: "memory");						\
+	})
+
+/*
+ * Enable FIQs
+ */
+#define __stf()							\
+	({							\
+		unsigned long temp;				\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ stf\n"		\
+"	bic	%0, %0, #64\n"					\
+"	msr	cpsr_c, %0"					\
+	: "=r" (temp)						\
+	:							\
+	: "memory");						\
+	})
+
+/*
+ * Disable FIQs
+ */
+#define __clf()							\
+	({							\
+		unsigned long temp;				\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ clf\n"		\
+"	orr	%0, %0, #64\n"					\
+"	msr	cpsr_c, %0"					\
+	: "=r" (temp)						\
+	:							\
+	: "memory");						\
+	})
+
+/*
+ * Save the current interrupt enable state.
+ */
+#define local_save_flags(x)					\
+	({							\
+	__asm__ __volatile__(					\
+	"mrs	%0, cpsr		@ local_save_flags\n"	\
+	  : "=r" (x)						\
+	  :							\
+	  : "memory");						\
+	})
+
+/*
+ * restore saved IRQ & FIQ state
+ */
+#define local_irq_restore(x)					\
+	__asm__ __volatile__(					\
+	"msr	cpsr_c, %0		@ local_irq_restore\n"	\
+	:							\
+	: "r" (x)						\
+	: "memory")
+
+#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
+/*
+ * On the StrongARM, "swp" is terminally broken since it bypasses the
+ * cache totally.  This means that the cache becomes inconsistent, and,
+ * since we use normal loads/stores as well, this is really bad.
+ * Typically, this causes oopsen in filp_close, but could have other,
+ * more disasterous effects.  There are two work-arounds:
+ *  1. Disable interrupts and emulate the atomic swap
+ *  2. Clean the cache, perform atomic swap, flush the cache
+ *
+ * We choose (1) since its the "easiest" to achieve here and is not
+ * dependent on the processor type.
+ */
+#define swp_is_buggy
+#endif
+
+static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
+{
+	extern void __bad_xchg(volatile void *, int);
+	unsigned long ret;
+#ifdef swp_is_buggy
+	unsigned long flags;
+#endif
+
+	switch (size) {
+#ifdef swp_is_buggy
+		case 1:
+			local_irq_save(flags);
+			ret = *(volatile unsigned char *)ptr;
+			*(volatile unsigned char *)ptr = x;
+			local_irq_restore(flags);
+			break;
+
+		case 4:
+			local_irq_save(flags);
+			ret = *(volatile unsigned long *)ptr;
+			*(volatile unsigned long *)ptr = x;
+			local_irq_restore(flags);
+			break;
+#else
+		case 1:	__asm__ __volatile__ ("swpb %0, %1, [%2]"
+					: "=&r" (ret)
+					: "r" (x), "r" (ptr)
+					: "memory");
+			break;
+		case 4:	__asm__ __volatile__ ("swp %0, %1, [%2]"
+					: "=&r" (ret)
+					: "r" (x), "r" (ptr)
+					: "memory");
+			break;
+#endif
+		default: __bad_xchg(ptr, size), ret = 0;
+	}
+
+	return ret;
+}
+
+#endif
diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h
new file mode 100644
index 00000000000..445d4495be1
--- /dev/null
+++ b/include/asm-arm/processor.h
@@ -0,0 +1,134 @@
+/*
+ *  linux/include/asm-arm/processor.h
+ *
+ *  Copyright (C) 1995-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_PROCESSOR_H
+#define __ASM_ARM_PROCESSOR_H
+
+/*
+ * Default implementation of macro that returns current
+ * instruction pointer ("program counter").
+ */
+#define current_text_addr() ({ __label__ _l; _l: &&_l;})
+
+#define FP_SIZE 35
+
+struct fp_hard_struct {
+	unsigned int save[FP_SIZE];		/* as yet undefined */
+};
+
+struct fp_soft_struct {
+	unsigned int save[FP_SIZE];		/* undefined information */
+};
+
+union fp_state {
+	struct fp_hard_struct	hard;
+	struct fp_soft_struct	soft;
+};
+
+typedef unsigned long mm_segment_t;		/* domain register	*/
+
+#ifdef __KERNEL__
+
+#define EISA_bus 0
+#define MCA_bus 0
+#define MCA_bus__is_a_macro
+
+#include <asm/atomic.h>
+#include <asm/ptrace.h>
+#if 0	/* XXX###XXX */
+#include <asm/arch/memory.h>
+#endif	/* XXX###XXX */
+#include <asm/proc/processor.h>
+#include <asm/types.h>
+
+union debug_insn {
+	u32	arm;
+	u16	thumb;
+};
+
+struct debug_entry {
+	u32			address;
+	union debug_insn	insn;
+};
+
+struct debug_info {
+	int			nsaved;
+	struct debug_entry	bp[2];
+};
+
+struct thread_struct {
+	atomic_t			refcount;
+							/* fault info	  */
+	unsigned long			address;
+	unsigned long			trap_no;
+	unsigned long			error_code;
+							/* floating point */
+	union fp_state			fpstate;
+							/* debugging	  */
+	struct debug_info		debug;
+							/* context info	  */
+	struct context_save_struct	*save;
+	EXTRA_THREAD_STRUCT
+};
+
+#define INIT_THREAD  {					\
+	refcount:	ATOMIC_INIT(1),			\
+	EXTRA_THREAD_STRUCT_INIT			\
+}
+
+/*
+ * Return saved PC of a blocked thread.
+ */
+static inline unsigned long thread_saved_pc(struct thread_struct *t)
+{
+	return t->save ? pc_pointer(t->save->pc) : 0;
+}
+
+static inline unsigned long thread_saved_fp(struct thread_struct *t)
+{
+	return t->save ? t->save->fp : 0;
+}
+
+/* Forward declaration, a strange C thing */
+struct task_struct;
+
+/* Free all resources held by a thread. */
+extern void release_thread(struct task_struct *);
+
+/* Copy and release all segment info associated with a VM */
+#define copy_segments(tsk, mm)		do { } while (0)
+#define release_segments(mm)		do { } while (0)
+
+unsigned long get_wchan(struct task_struct *p);
+
+#define THREAD_SIZE	(8192)
+
+extern struct task_struct *alloc_task_struct(void);
+extern void __free_task_struct(struct task_struct *);
+#define get_task_struct(p)	atomic_inc(&(p)->thread.refcount)
+#define free_task_struct(p)					\
+ do {								\
+	if (atomic_dec_and_test(&(p)->thread.refcount))		\
+		__free_task_struct((p));			\
+ } while (0)
+
+#define init_task	(init_task_union.task)
+#define init_stack	(init_task_union.stack)
+
+#define cpu_relax()	barrier()
+
+/*
+ * Create a new kernel thread
+ */
+extern int arch_kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+#endif
+
+#endif /* __ASM_ARM_PROCESSOR_H */
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
new file mode 100644
index 00000000000..0e4482b8c7a
--- /dev/null
+++ b/include/asm-arm/ptrace.h
@@ -0,0 +1,34 @@
+#ifndef __ASM_ARM_PTRACE_H
+#define __ASM_ARM_PTRACE_H
+
+#define PTRACE_GETREGS		12
+#define PTRACE_SETREGS		13
+#define PTRACE_GETFPREGS	14
+#define PTRACE_SETFPREGS	15
+
+#define PTRACE_SETOPTIONS	21
+
+/* options set using PTRACE_SETOPTIONS */
+#define PTRACE_O_TRACESYSGOOD	0x00000001
+
+#include <asm/proc/ptrace.h>
+
+#ifndef __ASSEMBLY__
+#define pc_pointer(v) \
+	((v) & ~PCMASK)
+
+#define instruction_pointer(regs) \
+	(pc_pointer((regs)->ARM_pc))
+
+#ifdef __KERNEL__
+extern void show_regs(struct pt_regs *);
+
+#define predicate(x)	(x & 0xf0000000)
+#define PREDICATE_ALWAYS	0xe0000000
+
+#endif
+
+#endif /* __ASSEMBLY__ */
+
+#endif
+
diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h
new file mode 100644
index 00000000000..c20b44813b8
--- /dev/null
+++ b/include/asm-arm/setup.h
@@ -0,0 +1,270 @@
+/*
+ *  linux/include/asm/setup.h
+ *
+ *  Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Structure passed to kernel to tell it about the
+ *  hardware it's running on.  See linux/Documentation/arm/Setup
+ *  for more info.
+ *
+ * NOTE:
+ *  This file contains two ways to pass information from the boot
+ *  loader to the kernel. The old struct param_struct is deprecated,
+ *  but it will be kept in the kernel for 5 years from now
+ *  (2001). This will allow boot loaders to convert to the new struct
+ *  tag way.
+ */
+#ifndef __ASMARM_SETUP_H
+#define __ASMARM_SETUP_H
+
+/*
+ * Usage:
+ *  - do not go blindly adding fields, add them at the end
+ *  - when adding fields, don't rely on the address until
+ *    a patch from me has been released
+ *  - unused fields should be zero (for future expansion)
+ *  - this structure is relatively short-lived - only
+ *    guaranteed to contain useful data in setup_arch()
+ */
+#define COMMAND_LINE_SIZE 1024
+
+/* This is the old deprecated way to pass parameters to the kernel */
+struct param_struct {
+    union {
+	struct {
+	    unsigned long page_size;		/*  0 */
+	    unsigned long nr_pages;		/*  4 */
+	    unsigned long ramdisk_size;		/*  8 */
+	    unsigned long flags;		/* 12 */
+#define FLAG_READONLY	1
+#define FLAG_RDLOAD	4
+#define FLAG_RDPROMPT	8
+	    unsigned long rootdev;		/* 16 */
+	    unsigned long video_num_cols;	/* 20 */
+	    unsigned long video_num_rows;	/* 24 */
+	    unsigned long video_x;		/* 28 */
+	    unsigned long video_y;		/* 32 */
+	    unsigned long memc_control_reg;	/* 36 */
+	    unsigned char sounddefault;		/* 40 */
+	    unsigned char adfsdrives;		/* 41 */
+	    unsigned char bytes_per_char_h;	/* 42 */
+	    unsigned char bytes_per_char_v;	/* 43 */
+	    unsigned long pages_in_bank[4];	/* 44 */
+	    unsigned long pages_in_vram;	/* 60 */
+	    unsigned long initrd_start;		/* 64 */
+	    unsigned long initrd_size;		/* 68 */
+	    unsigned long rd_start;		/* 72 */
+	    unsigned long system_rev;		/* 76 */
+	    unsigned long system_serial_low;	/* 80 */
+	    unsigned long system_serial_high;	/* 84 */
+	    unsigned long mem_fclk_21285;       /* 88 */
+	} s;
+	char unused[256];
+    } u1;
+    union {
+	char paths[8][128];
+	struct {
+	    unsigned long magic;
+	    char n[1024 - sizeof(unsigned long)];
+	} s;
+    } u2;
+    char commandline[COMMAND_LINE_SIZE];
+};
+
+
+
+/*
+ * The new way of passing information: a list of tagged entries
+ */
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE	0x00000000
+
+struct tag_header {
+	u32 size;
+	u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE	0x54410001
+
+struct tag_core {
+	u32 flags;		/* bit 0 = read-only */
+	u32 pagesize;
+	u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM	0x54410002
+
+struct tag_mem32 {
+	u32	size;
+	u32	start;	/* physical start address */
+};
+
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT	0x54410003
+
+struct tag_videotext {
+	u8		x;
+	u8		y;
+	u16		video_page;
+	u8		video_mode;
+	u8		video_cols;
+	u16		video_ega_bx;
+	u8		video_lines;
+	u8		video_isvga;
+	u16		video_points;
+};
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK	0x54410004
+
+struct tag_ramdisk {
+	u32 flags;	/* bit 0 = load, bit 1 = prompt */
+	u32 size;	/* decompressed ramdisk size in _kilo_ bytes */
+	u32 start;	/* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives (virtual address) */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * its depreciated.
+ */
+#define ATAG_INITRD	0x54410005
+
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2	0x54420005
+
+struct tag_initrd {
+	u32 start;	/* physical start address */
+	u32 size;	/* size of compressed ramdisk image in bytes */
+};
+
+/* board serial number. "64 bits should be enough for everybody" */
+#define ATAG_SERIAL	0x54410006
+
+struct tag_serialnr {
+	u32 low;
+	u32 high;
+};
+
+/* board revision */
+#define ATAG_REVISION	0x54410007
+
+struct tag_revision {
+	u32 rev;
+};
+
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+ */
+#define ATAG_VIDEOLFB	0x54410008
+
+struct tag_videolfb {
+	u16		lfb_width;
+	u16		lfb_height;
+	u16		lfb_depth;
+	u16		lfb_linelength;
+	u32		lfb_base;
+	u32		lfb_size;
+	u8		red_size;
+	u8		red_pos;
+	u8		green_size;
+	u8		green_pos;
+	u8		blue_size;
+	u8		blue_pos;
+	u8		rsvd_size;
+	u8		rsvd_pos;
+};
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE	0x54410009
+
+struct tag_cmdline {
+	char	cmdline[1];	/* this is the minimum size */
+};
+
+/* acorn RiscPC specific information */
+#define ATAG_ACORN	0x41000101
+
+struct tag_acorn {
+	u32 memc_control_reg;
+	u32 vram_pages;
+	u8 sounddefault;
+	u8 adfsdrives;
+};
+
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK	0x41000402
+
+struct tag_memclk {
+	u32 fmemclk;
+};
+
+struct tag {
+	struct tag_header hdr;
+	union {
+		struct tag_core		core;
+		struct tag_mem32	mem;
+		struct tag_videotext	videotext;
+		struct tag_ramdisk	ramdisk;
+		struct tag_initrd	initrd;
+		struct tag_serialnr	serialnr;
+		struct tag_revision	revision;
+		struct tag_videolfb	videolfb;
+		struct tag_cmdline	cmdline;
+
+		/*
+		 * Acorn specific
+		 */
+		struct tag_acorn	acorn;
+
+		/*
+		 * DC21285 specific
+		 */
+		struct tag_memclk	memclk;
+	} u;
+};
+
+struct tagtable {
+	u32 tag;
+	int (*parse)(const struct tag *);
+};
+
+#define __tag __attribute__((unused, __section__(".taglist")))
+#define __tagtable(tag, fn) \
+static struct tagtable __tagtable_##fn __tag = { tag, fn }
+
+#define tag_member_present(tag,member)				\
+	((unsigned long)(&((struct tag *)0L)->member + 1)	\
+		<= (tag)->hdr.size * 4)
+
+#define tag_next(t)	((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)	((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base)		\
+	for (t = base; t->hdr.size; t = tag_next(t))
+
+/*
+ * Memory map description
+ */
+#define NR_BANKS 8
+
+struct meminfo {
+	int nr_banks;
+	unsigned long end;
+	struct {
+		unsigned long start;
+		unsigned long size;
+		int           node;
+	} bank[NR_BANKS];
+};
+
+extern struct meminfo meminfo;
+
+#endif
diff --git a/include/asm-arm/sizes.h b/include/asm-arm/sizes.h
new file mode 100644
index 00000000000..f8d92ca1204
--- /dev/null
+++ b/include/asm-arm/sizes.h
@@ -0,0 +1,52 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ *                 from .s file by awk -f s2h.awk
+ */
+/*  Size defintions
+ *  Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h                       1
+
+/* handy sizes */
+#define SZ_1K                           0x00000400
+#define SZ_4K                           0x00001000
+#define SZ_8K                           0x00002000
+#define SZ_16K                          0x00004000
+#define SZ_64K                          0x00010000
+#define SZ_128K                         0x00020000
+#define SZ_256K                         0x00040000
+#define SZ_512K                         0x00080000
+
+#define SZ_1M                           0x00100000
+#define SZ_2M                           0x00200000
+#define SZ_4M                           0x00400000
+#define SZ_8M                           0x00800000
+#define SZ_16M                          0x01000000
+#define SZ_32M                          0x02000000
+#define SZ_64M                          0x04000000
+#define SZ_128M                         0x08000000
+#define SZ_256M                         0x10000000
+#define SZ_512M                         0x20000000
+
+#define SZ_1G                           0x40000000
+#define SZ_2G                           0x80000000
+
+#endif
+
+/*         END */
diff --git a/include/asm-ppc/hymod.h b/include/asm-ppc/hymod.h
deleted file mode 100644
index b4179bf8f65..00000000000
--- a/include/asm-ppc/hymod.h
+++ /dev/null
@@ -1,289 +0,0 @@
-#ifndef _ASM_HYMOD_H_
-#define _ASM_HYMOD_H_
-
-#include <linux/config.h>
-#ifdef CONFIG_8260
-#include <asm/iopin_8260.h>
-#endif
-
-/*
- * hymod configuration data - passed by boot code via the board information
- * structure (only U-Boot has support for this at the moment)
- *
- * there are three types of data passed up from the boot monitor. the first
- * (type hymod_eeprom_t) is the eeprom data that was read off both the main
- * (or mother) board and the mezzanine board (if any). this data defines how
- * many Xilinx fpgas are on each board, and their types (among other things).
- * the second type of data (type xlx_mmap_t, one per Xilinx fpga) defines where
- * in the physical address space the various Xilinx fpga access regions have
- * been mapped by the boot rom. the third type of data (type xlx_iopins_t,
- * one per Xilinx fpga) defines which io port pins are connected to the various
- * signals required to program a Xilinx fpga.
- *
- * A ram/flash "bank" refers to memory controlled by the same chip select.
- *
- * the eeprom contents are defined as in technical note #2 - basically,
- * a header, zero or more records in no particular order, and a 32 bit crc
- * a record is 1 or more type bytes, a length byte and "length" bytes.
- */
-
-#define HYMOD_EEPROM_ID		0xAA	/* eeprom id byte */
-#define HYMOD_EEPROM_VER	1	/* eeprom contents version */
-#define HYMOD_EEPROM_SIZE	256	/* number of bytes in the eeprom */
-
-/* eeprom header */
-typedef
-    struct {
-	unsigned char id;		/* eeprom id byte */
-	unsigned char ver;		/* eeprom contents version number */
-	unsigned long len;		/* total # of bytes btw hdr and crc */
-    }
-hymod_eehdr_t;
-
-/* maximum number of bytes available for eeprom data records */
-#define HYMOD_EEPROM_MAXLEN	(HYMOD_EEPROM_SIZE \
-					- sizeof (hymod_eehdr_t) \
-					- sizeof (unsigned long))
-
-/* eeprom data record */
-typedef
-    union {
-	struct {
-	    unsigned char topbit:1;
-	    unsigned char type:7;
-	    unsigned char len;
-	    unsigned char data[1];	/* variable length */
-	} small;
-	struct {
-	    unsigned short topbit:1;
-	    unsigned short nxtbit:1;
-	    unsigned short type:14;
-	    unsigned short len;
-	    unsigned char data[1];	/* variable length */
-	} medium;
-	struct {
-	    unsigned long topbit:1;
-	    unsigned long nxtbit:1;
-	    unsigned long type:30;
-	    unsigned long len;
-	    unsigned char data[1];	/* variable length */
-	} large;
-    }
-hymod_eerec_t;
-
-#define HYMOD_EEOFF_MAIN	0x00	/* i2c addr offset for main eeprom */
-#define HYMOD_EEOFF_MEZZ	0x04	/* i2c addr offset for mezz eepomr */
-
-/* eeprom record types */
-#define HYMOD_EEREC_SERNO	1	/* serial number */
-#define HYMOD_EEREC_DATE	2	/* date */
-#define HYMOD_EEREC_BATCH	3	/* batch id */
-#define HYMOD_EEREC_TYPE	4	/* board type */
-#define HYMOD_EEREC_REV		5	/* revision number */
-#define HYMOD_EEREC_SDRAM	6	/* sdram sizes */
-#define HYMOD_EEREC_FLASH	7	/* flash sizes */
-#define HYMOD_EEREC_ZBT		8	/* zbt ram sizes */
-#define HYMOD_EEREC_XLXTYP	9	/* Xilinx fpga types */
-#define HYMOD_EEREC_XLXSPD	10	/* Xilinx fpga speeds */
-#define HYMOD_EEREC_XLXTMP	11	/* Xilinx fpga temperatures */
-#define HYMOD_EEREC_XLXGRD	12	/* Xilinx fpga grades */
-#define HYMOD_EEREC_CPUTYP	13	/* Motorola CPU type */
-#define HYMOD_EEREC_CPUSPD	14	/* CPU speed */
-#define HYMOD_EEREC_BUSSPD	15	/* bus speed */
-#define HYMOD_EEREC_CPMSPD	16	/* CPM speed */
-#define HYMOD_EEREC_HSTYPE	17	/* high-speed serial chip type */
-#define HYMOD_EEREC_HSCHIN	18	/* high-speed serial input channels */
-#define HYMOD_EEREC_HSCHOUT	19	/* high-speed serial output channels */
-
-/* some dimensions */
-#define HYMOD_MAX_BATCH		32	/* max no. of bytes in batch id */
-#define HYMOD_MAX_SDRAM		4	/* max sdram "banks" on any board */
-#define HYMOD_MAX_FLASH		4	/* max flash "banks" on any board */
-#define HYMOD_MAX_ZBT		16	/* max ZBT rams on any board */
-#define HYMOD_MAX_XLX		4	/* max Xilinx fpgas on any board */
-
-#define HYMOD_MAX_BYTES		16	/* enough to store any bytes array */
-
-/* board types */
-#define HYMOD_BDTYPE_NONE	0	/* information not present */
-#define HYMOD_BDTYPE_IO		1	/* I/O main board */
-#define HYMOD_BDTYPE_CLP	2	/* CLP main board */
-#define HYMOD_BDTYPE_DSP	3	/* DSP main board */
-#define HYMOD_BDTYPE_INPUT	4	/* video input mezzanine board */
-#define HYMOD_BDTYPE_ALTINPUT	5	/* video input mezzanine board */
-#define HYMOD_BDTYPE_DISPLAY	6	/* video display mezzanine board */
-#define HYMOD_BDTYPE_MAX	7	/* first invalid value */
-
-/* Xilinx fpga types */
-#define HYMOD_XTYP_NONE		0	/* information not present */
-#define HYMOD_XTYP_XCV300E	1	/* Xilinx Virtex 300 */
-#define HYMOD_XTYP_XCV400E	2	/* Xilinx Virtex 400 */
-#define HYMOD_XTYP_XCV600E	3	/* Xilinx Virtex 600 */
-#define HYMOD_XTYP_MAX		4	/* first invalid value */
-
-/* Xilinx fpga speeds */
-#define HYMOD_XSPD_NONE		0	/* information not present */
-#define HYMOD_XSPD_SIX		1
-#define HYMOD_XSPD_SEVEN	2
-#define HYMOD_XSPD_EIGHT	3
-#define HYMOD_XSPD_MAX		4	/* first invalid value */
-
-/* Xilinx fpga temperatures */
-#define HYMOD_XTMP_NONE		0	/* information not present */
-#define HYMOD_XTMP_COM		1
-#define HYMOD_XTMP_IND		2
-#define HYMOD_XTMP_MAX		3	/* first invalid value */
-
-/* Xilinx fpga grades */
-#define HYMOD_XTMP_NONE		0	/* information not present */
-#define HYMOD_XTMP_NORMAL	1
-#define HYMOD_XTMP_ENGSAMP	2
-#define HYMOD_XTMP_MAX		3	/* first invalid value */
-
-/* CPU types */
-#define HYMOD_CPUTYPE_NONE	0	/* information not present */
-#define HYMOD_CPUTYPE_MPC8260	1	/* Motorola MPC8260 embedded powerpc */
-#define HYMOD_CPUTYPE_MAX	2	/* first invalid value */
-
-/* CPU/BUS/CPM clock speeds */
-#define HYMOD_CLKSPD_NONE	0	/* information not present */
-#define HYMOD_CLKSPD_33MHZ	1
-#define HYMOD_CLKSPD_66MHZ	2
-#define HYMOD_CLKSPD_100MHZ	3
-#define HYMOD_CLKSPD_133MHZ	4
-#define HYMOD_CLKSPD_166MHZ	5
-#define HYMOD_CLKSPD_200MHZ	6
-#define HYMOD_CLKSPD_MAX	7	/* first invalid value */
-
-/* high speed serial chip types */
-#define HYMOD_HSSTYPE_NONE	0	/* information not present */
-#define HYMOD_HSSTYPE_AMCC52064	1
-#define HYMOD_HSSTYPE_MAX	2	/* first invalid value */
-
-/* a date (yyyy-mm-dd) */
-typedef
-    struct {
-	unsigned short year;
-	unsigned char month;
-	unsigned char day;
-    }
-hymod_date_t;
-
-/* describes a Xilinx fpga */
-typedef
-    struct {
-	unsigned char type;		/* chip type */
-	unsigned char speed;		/* chip speed rating */
-	unsigned char temp;		/* chip temperature rating */
-	unsigned char grade;		/* chip grade */
-    }
-hymod_xlx_t;
-
-/* describes a Motorola embedded processor */
-typedef
-    struct {
-	unsigned char type;		/* CPU type */
-	unsigned char cpuspd;		/* speed of the PowerPC core */
-	unsigned char busspd;		/* speed of the system and 60x bus */
-	unsigned char cpmspd;		/* speed of the CPM co-processor */
-    }
-hymod_mpc_t;
-
-/* info about high-speed (1Gbit) serial interface */
-typedef
-    struct {
-	unsigned char type;		/* high-speed serial chip type */
-	unsigned char nchin;		/* number of input channels mounted */
-	unsigned char nchout;		/* number of output channels mounted */
-    }
-hymod_hss_t;
-
-/*
- * this defines the contents of the serial eeprom that exists on every
- * hymod board, including mezzanine boards (the serial eeprom will be
- * faked for early development boards that don't have one)
- */
-
-typedef
-    struct {
-	unsigned char ver;		/* eeprom contents version */
-	unsigned char bdtype;		/* board type */
-	unsigned char bdrev;		/* board revision */
-	unsigned char batchlen;		/* length of batch string below */
-	unsigned long serno;		/* serial number */
-	hymod_date_t date;		/* manufacture date */
-	unsigned char batch[32];	/* manufacturer specific batch id */
-	unsigned char nsdram;		/* # of ram "banks" */
-	unsigned char nflash;		/* # of flash "banks" */
-	unsigned char nzbt;		/* # of ZBT rams */
-	unsigned char nxlx;		/* # of Xilinx fpgas */
-	unsigned char sdramsz[HYMOD_MAX_SDRAM];	/* log2 of sdram size */
-	unsigned char flashsz[HYMOD_MAX_FLASH];	/* log2 of flash size */
-	unsigned char zbtsz[HYMOD_MAX_ZBT];	/* log2 of ZBT ram size */
-	hymod_xlx_t xlx[HYMOD_MAX_XLX];	/* Xilinx fpga info */
-	hymod_mpc_t mpc;		/* Motorola MPC CPU info */
-	hymod_hss_t hss;		/* high-speed serial info */
-    }
-hymod_eeprom_t;
-
-/*
- * this defines a region in the processor's physical address space
- */
-typedef
-    struct {
-	unsigned long exists:1;		/* 1 if the region exists, 0 if not */
-	unsigned long size:31;		/* size in bytes */
-	unsigned long base;		/* base address */
-    }
-xlx_prgn_t;
-
-/*
- * this defines where the various Xilinx fpga access regions are mapped
- * into the physical address space of the processor
- */
-typedef
-    struct {
-	xlx_prgn_t prog;		/* program access region */
-	xlx_prgn_t reg;			/* register access region */
-	xlx_prgn_t port;		/* port access region */
-    }
-xlx_mmap_t;
-
-/*
- * this defines which 8260 i/o port pins are connected to the various
- * signals required for programming a Xilinx fpga
- */
-typedef
-    struct {
-	iopin_t prog_pin;		/* assert for >= 300ns to program */
-	iopin_t init_pin;		/* goes high when fpga is cleared */
-	iopin_t done_pin;		/* goes high when program is done */
-	iopin_t enable_pin;		/* some fpgas need enabling */
-    }
-xlx_iopins_t;
-
-/* all info about one hymod board */
-typedef
-    struct {
-	unsigned char eeprom_valid:1;
-	hymod_eeprom_t eeprom;
-	xlx_mmap_t mmap[HYMOD_MAX_XLX];
-	xlx_iopins_t iopins[HYMOD_MAX_XLX];
-    }
-hymod_board_t;
-
-/*
- * this defines the configuration information of a hymod board-set
- * (main board + possible mezzanine board). In future, there may be
- * more than one mezzanine board (stackable?) - if so, add a "mezz2"
- * field, and so on... or make mezz an array?
- */
-typedef
-    struct {
-	hymod_board_t main;		/* main board info */
-	hymod_board_t mezz;		/* mezzanine board info */
-	unsigned long crc;		/* ensures kernel and boot prom agree */
-    }
-hymod_conf_t;
-
-#endif /* _ASM_HYMOD_H_ */