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authorMike Williams <mike@mikebwilliams.com>2011-07-22 04:01:30 +0000
committerWolfgang Denk <wd@denx.de>2011-07-28 21:27:36 +0200
commit1626308797ac4184e73e56d275a1b8da11a62d5b (patch)
treed12fd0d610303c3d2351d8ace314a643f20e0fc9 /include
parent2469c4b2dbdd601a4e44ecf9925b99bd2cd1b43f (diff)
cleanup: Fix typos and misspellings in various files.
Recieve/Receive recieve/receive Interupt/Interrupt interupt/interrupt Addres/Address addres/address Signed-off-by: Mike Williams <mike@mikebwilliams.com>
Diffstat (limited to 'include')
-rw-r--r--include/commproc.h2
-rw-r--r--include/configs/NETTA.h2
-rw-r--r--include/configs/TQM834x.h2
-rw-r--r--include/galileo/gt64260R.h2
-rw-r--r--include/mpc5xxx_sdma.h4
-rw-r--r--include/mpc824x.h2
6 files changed, 7 insertions, 7 deletions
diff --git a/include/commproc.h b/include/commproc.h
index a69a80913e5..8b8cc45dadf 100644
--- a/include/commproc.h
+++ b/include/commproc.h
@@ -108,7 +108,7 @@ typedef struct cpm_buf_desc {
uint cbd_bufaddr; /* Buffer address in host memory */
} cbd_t;
-#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */
+#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index bdc93b6f11b..92b7d6a1ee1 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -589,7 +589,7 @@
+------+----------------+------------------------------------------------------------
| # | Name | Comment
+------+----------------+------------------------------------------------------------
- | IRQ1 | UINTER_3V | S interupt chips interrupt (common)
+ | IRQ1 | UINTER_3V | S interrupt chips interrupt (common)
| IRQ3 | IRQ_DSP | DSP interrupt
| IRQ4 | IRQ_DSP1 | Extra DSP interrupt
+------+----------------+------------------------------------------------------------
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index 7c9dd79e3d2..5cd517d942d 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -39,7 +39,7 @@
#define CONFIG_SYS_TEXT_BASE 0x80000000
-/* IMMR Base Addres Register, use Freescale default: 0xff400000 */
+/* IMMR Base Address Register, use Freescale default: 0xff400000 */
#define CONFIG_SYS_IMMR 0xff400000
/* System clock. Primary input clock when in PCI host mode */
diff --git a/include/galileo/gt64260R.h b/include/galileo/gt64260R.h
index c2cfb0670ed..b55da9d3522 100644
--- a/include/galileo/gt64260R.h
+++ b/include/galileo/gt64260R.h
@@ -1182,7 +1182,7 @@
#define CHANNEL2_REGISTER10 0x9070
#define CHANNEL2_REGISTER11 0x9074
-/* MPSCs Interupts */
+/* MPSCs Interrupts */
#define MPSC0_CAUSE 0xb824
#define MPSC0_MASK 0xb8a4
diff --git a/include/mpc5xxx_sdma.h b/include/mpc5xxx_sdma.h
index 8b740e4e6e2..821ac0ac622 100644
--- a/include/mpc5xxx_sdma.h
+++ b/include/mpc5xxx_sdma.h
@@ -82,11 +82,11 @@ ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
sdma->IntPend = (1 << tasknum); \
}
-/* get interupt pending bit of a task */
+/* get interrupt pending bit of a task */
#define SDMA_GET_PENDINGBIT(tasknum) \
((*(vu_long *)(MPC5XXX_SDMA + 0x14)) & (1<<(tasknum)))
-/* get interupt mask bit of a task */
+/* get interrupt mask bit of a task */
#define SDMA_GET_MASKBIT(tasknum) \
((*(vu_long *)(MPC5XXX_SDMA + 0x18)) & (1<<(tasknum)))
diff --git a/include/mpc824x.h b/include/mpc824x.h
index fca9371bddb..cb8445830e3 100644
--- a/include/mpc824x.h
+++ b/include/mpc824x.h
@@ -258,7 +258,7 @@
#define PLTR 0x8000000d /* PCI Latancy Timer Register */
#define PHTR 0x8000000e /* PCI Header Type Register */
#define BISTCTRL 0x8000000f /* BIST Control */
-#define LMBAR 0x80000010 /* Local Base Addres Register */
+#define LMBAR 0x80000010 /* Local Base Address Register */
#define PCSRBAR 0x80000014 /* PCSR Base Address Register */
#define ILR 0x8000003c /* PCI Interrupt Line Register */
#define IPR 0x8000003d /* Interrupt Pin Register */