diff options
author | Matthias Fuchs <matthias.fuchs@esd-electronics.com> | 2007-06-24 17:41:21 +0200 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2007-06-25 11:58:46 +0200 |
commit | 6f35c53166213c24a5a0e2390ed861136ff73870 (patch) | |
tree | 284d8ce25c41fb97bdb6ceea137f1e661fb4c653 /include | |
parent | 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8 (diff) |
ppc4xx: Maintenance patch for esd's CPCI405 derivats
-add pci_pre_init() for pci interrupt fixup code
-disable phy sleep mode via reset_phy() function
-use correct io accessors
-cleanup
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/CPCI405.h | 5 | ||||
-rw-r--r-- | include/configs/CPCI4052.h | 6 | ||||
-rw-r--r-- | include/configs/CPCI405AB.h | 5 | ||||
-rw-r--r-- | include/configs/CPCI405DT.h | 5 |
4 files changed, 21 insertions, 0 deletions
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 047e2f1eef9..67f75811301 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -55,6 +55,10 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ + +#define CONFIG_NET_MULTI 1 +#undef CONFIG_HAS_ETH1 #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ CONFIG_BOOTP_DNS | \ @@ -139,6 +143,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index d756f447f7f..8abdbdc6df2 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -37,6 +37,7 @@ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ #define CONFIG_CPCI405 1 /* ...on a CPCI405 board */ #define CONFIG_CPCI405_VER2 1 /* ...version 2 */ +#undef CONFIG_CPCI405_6U /* enable this for 6U boards */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ @@ -56,6 +57,10 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ + +#define CONFIG_NET_MULTI 1 +#undef CONFIG_HAS_ETH1 #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ @@ -166,6 +171,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index 852d94a410a..ab6d1168f1d 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -57,6 +57,10 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ + +#define CONFIG_NET_MULTI 1 +#undef CONFIG_HAS_ETH1 #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ @@ -150,6 +154,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 2260327c3f8..42ec0801ad7 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -56,6 +56,10 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ +#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ + +#define CONFIG_NET_MULTI 1 +#undef CONFIG_HAS_ETH1 #define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ @@ -171,6 +175,7 @@ #define PCI_HOST_AUTO 2 /* detected via arbiter enable */ #define CONFIG_PCI /* include pci support */ +#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ /* resource configuration */ |