diff options
author | Abel Vesa <abel.vesa@nxp.com> | 2018-09-26 13:56:58 +0300 |
---|---|---|
committer | Abel Vesa <abel.vesa@nxp.com> | 2018-09-28 16:47:47 +0300 |
commit | 143b65448e5717cfc51b6ac94594eaf651afbb8d (patch) | |
tree | 0821f64e9fd1d7bd2b9a7ce135ee33e370f85a53 /include | |
parent | 3695f4c41c1643d4dadb67eb8a52f775ac8abeb2 (diff) |
MLK-19770-2 iMX8QM SPL: include/configs: imx8qm_mek: Add SPL build config
Add all necessary configs when building for SPL based on CONFIG_SPL_BUILD set.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/imx8qm_mek.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 89201a58cfa..2d8f85aa564 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -11,6 +11,46 @@ #include <asm/arch/imx-regs.h> #include "imx_env.h" +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (flash.bin_offset + 2Mb)/sector_size */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + + +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_MALLOC_F_ADDR 0x00120000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ + +#define CONFIG_OF_EMBED +#define CONFIG_ATF_TEXT_BASE 0x80000000 +#define CONFIG_SYS_ATF_START 0x80000000 +/* #define CONFIG_FIT */ + +/* Since the SPL runs before ATF, MU1 will not be started yet, so use MU0 */ +#define SC_IPC_CH SC_IPC_AP_CH0 + +#endif + + #define CONFIG_REMAKE_ELF #define CONFIG_BOARD_EARLY_INIT_F |