diff options
author | Teo Hall <teo.hall@nxp.com> | 2018-09-21 18:15:29 -0500 |
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committer | Teo Hall <teo.hall@nxp.com> | 2018-09-27 17:29:39 -0500 |
commit | a6b6fd8aa69c2f8a9a4c8b5a15de6aa044b39fba (patch) | |
tree | 5ee46749aae6c3c768f5ce75c135e0569addca9a /include | |
parent | e3c26a7b908a6a3591ab2e619735c44a85e23972 (diff) |
MLK-19183-14: iMX8QXP SPL: Add ARM2 board support
Add implementation for ARM2 LPDDR4 board
Signed-off-by: Teo Hall <teo.hall@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/imx8qxp_arm2.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/include/configs/imx8qxp_arm2.h b/include/configs/imx8qxp_arm2.h index 042bad8be94..f0c72f36a72 100644 --- a/include/configs/imx8qxp_arm2.h +++ b/include/configs/imx8qxp_arm2.h @@ -12,6 +12,50 @@ #include "imx_env.h" +#ifdef CONFIG_SPL_BUILD + +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_SPL_SPI_LOAD +#endif + +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (32K + 2Mb)/sector_size */ +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + + +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_MALLOC_F_ADDR 0x00120000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */ + +#define CONFIG_OF_EMBED +#define CONFIG_ATF_TEXT_BASE 0x80000000 +#define CONFIG_SYS_ATF_START 0x80000000 +/* #define CONFIG_FIT */ + +/* Since the SPL runs before ATF, MU1 will not be started yet, so use MU0 */ +#define SC_IPC_CH SC_IPC_AP_CH0 + +#endif + #define CONFIG_REMAKE_ELF #define CONFIG_BOARD_EARLY_INIT_F |