diff options
| author | wdenk <wdenk> | 2003-08-05 17:43:17 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-08-05 17:43:17 +0000 |
| commit | bdccc4fedcf9c5fc1f06e8f833d792198c9d04ae (patch) | |
| tree | 00c1b93f6731d838eae4f8f688d4f95c14471d0a /include | |
| parent | 96dd9af4c7c5669924c2e40734b246f207b9a8b4 (diff) | |
* Map ISP1362 USB OTG controller for NSCU board
* Patch by Brad Parker, 02 Aug 2003:
fix sc520_cdp problems
* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)
* Allow erase command to cross flash bank boundaries
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/cpm_8260.h | 7 | ||||
| -rw-r--r-- | include/common.h | 5 | ||||
| -rw-r--r-- | include/commproc.h | 6 | ||||
| -rw-r--r-- | include/configs/NSCU.h | 11 |
4 files changed, 28 insertions, 1 deletions
diff --git a/include/asm-ppc/cpm_8260.h b/include/asm-ppc/cpm_8260.h index 5c70603f485..b3d08ffd4d7 100644 --- a/include/asm-ppc/cpm_8260.h +++ b/include/asm-ppc/cpm_8260.h @@ -141,6 +141,13 @@ typedef struct cpm_buf_desc { #else #define CPM_POST_WORD_ADDR CFG_CPM_POST_WORD_ADDR #endif + +#ifndef CFG_CPM_BOOTCOUNT_ADDR +#define CPM_BOOTCOUNT_ADDR (CPM_POST_WORD_ADDR - 2*sizeof(ulong)) +#else +#define CPM_BOOTCOUNT_ADDR CFG_CPM_BOOTCOUNT_ADDR +#endif + #define PROFF_SCC1 ((uint)0x8000) #define PROFF_SCC2 ((uint)0x8100) #define PROFF_SCC3 ((uint)0x8200) diff --git a/include/common.h b/include/common.h index 5158f97ece3..94007195852 100644 --- a/include/common.h +++ b/include/common.h @@ -236,7 +236,7 @@ extern void pic_write (uchar reg, uchar val); # define CFG_DEF_EEPROM_ADDR CFG_I2C_EEPROM_ADDR #endif /* CONFIG_SPI || !defined(CFG_I2C_EEPROM_ADDR) */ -#if defined(CONFIG_PCU_E) || defined(CONFIG_CCM) || defined(CONFIG_ATC) +#if defined(CONFIG_SPI) extern void spi_init_f (void); extern void spi_init_r (void); extern ssize_t spi_read (uchar *, int, uchar *, int); @@ -400,6 +400,9 @@ uint dpram_alloc(uint size); uint dpram_alloc_align(uint size,uint align); void post_word_store (ulong); ulong post_word_load (void); +void bootcount_store (ulong); +ulong bootcount_load (void); +#define BOOTCOUNT_MAGIC 0xB001C041 /* $(CPU)/.../<eth> */ void mii_init (void); diff --git a/include/commproc.h b/include/commproc.h index 68452483513..63dcc4c9a3d 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -83,6 +83,12 @@ #define CPM_POST_WORD_ADDR CFG_CPM_POST_WORD_ADDR #endif +#ifndef CFG_CPM_BOOTCOUNT_ADDR +#define CPM_BOOTCOUNT_ADDR (CPM_POST_WORD_ADDR - 2*sizeof(ulong)) +#else +#define CPM_BOOTCOUNT_ADDR CFG_CPM_BOOTCOUNT_ADDR +#endif + #define BD_IIC_START ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */ /* Export the base address of the communication processor registers diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h index 81694538821..3bf54d2eb9d 100644 --- a/include/configs/NSCU.h +++ b/include/configs/NSCU.h @@ -90,6 +90,8 @@ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ +#define CONFIG_ISP1362_USB /* ISP1362 USB OTG controller */ + #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_ASKENV | \ CFG_CMD_DHCP | \ @@ -392,6 +394,15 @@ BR_PS_8 | BR_MS_UPMB | BR_V ) #endif /* CONFIG_CAN_DRIVER */ +#ifdef CONFIG_ISP1362_USB +#define CFG_ISP1362_BASE 0xD0000000 /* ISP1362 mapped at 0xD0000000 */ +#define CFG_ISP1362_OR_AM 0xFFFF8000 /* 32 kB address mask */ +#define CFG_OR5_ISP1362 (CFG_ISP1362_OR_AM | OR_CSNT_SAM | \ + OR_ACS_DIV2 | OR_BI | OR_SCY_5_CLK) +#define CFG_BR5_ISP1362 ((CFG_ISP1362_BASE & BR_BA_MSK) | \ + BR_PS_16 | BR_MS_GPCM | BR_V ) +#endif /* CONFIG_ISP1362_USB */ + /* * Memory Periodic Timer Prescaler * |