Merge branch 'master' of git://88.191.163.10/u-boot-arm

Fixup an easy conflict over adding the clk_get prototype and USB_OTG defines for am33xx having moved. Conflicts: arch/arm/include/asm/arch-am33xx/hardware.h Signed-off-by: Tom Rini <trini@ti.com>
author: Tom Rini <trini@ti.com> 2013-08-18 14:14:34 -0400
committer: Tom Rini <trini@ti.com> 2013-08-18 14:14:34 -0400
commit: e20cc2ca15b5b0644f51b6e58d530d70acd2bc00 (patch)
tree: f85a22536682ef54e77b1ba95cf0b71d00644632 /include
parent: f21876174364391757e743cb8673d3fc5fce7ac7 (diff)
parent: 9ed887caecb9ecb0c68773a1870d143b9f28d3da (diff)
48 files changed, 1818 insertions, 1537 deletions
diff --git a/include/bootstage.h b/include/bootstage.h
index 25b4e07c7e7..87bf906b263 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -353,6 +353,7 @@ static inline ulong bootstage_error(enum bootstage_id id)
 
 static inline ulong bootstage_mark_name(enum bootstage_id id, const char *name)
 {
+	show_boot_progress(id);
 	return 0;
 }
 
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index c5a6d4b3151..e0a87f8bc4d 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -16,66 +16,62 @@
 #ifndef __CONFIG_AM335X_EVM_H
 #define __CONFIG_AM335X_EVM_H
 
-#define CONFIG_AM33XX
-#define CONFIG_OMAP
+#include <configs/ti_am335x_common.h>
 
-#include <asm/arch/omap.h>
-
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
-
-#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
-#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
-#define CONFIG_SYS_PROMPT		"U-Boot# "
-#define CONFIG_BOARD_LATE_INIT
-#define CONFIG_SYS_NO_FLASH
 #define MACH_TYPE_TIAM335EVM		3589	/* Until the next sync */
 #define CONFIG_MACH_TYPE		MACH_TYPE_TIAM335EVM
 
-#define CONFIG_OF_LIBFDT
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
+/* Clock Defines */
+#define V_OSCK				24000000  /* Clock output from T2 */
+#define V_SCLK				(V_OSCK)
 
-#define CONFIG_SYS_CACHELINE_SIZE       64
+/* Custom script for NOR */
+#define CONFIG_SYS_LDSCRIPT		"board/ti/am335x/u-boot.lds"
 
-/* commands to include */
-#include <config_cmd_default.h>
+/* Always 128 KiB env size */
+#define CONFIG_ENV_SIZE			(128 << 10)
 
-#define CONFIG_CMD_ASKENV
-#define CONFIG_VERSION_VARIABLE
+#ifdef CONFIG_NAND
+#define NANDARGS \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
+	"nandargs=setenv bootargs console=${console} " \
+		"${optargs} " \
+		"root=${nandroot} " \
+		"rootfstype=${nandrootfstype}\0" \
+	"dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \
+	"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
+	"nandrootfstype=ubifs rootwait=1\0" \
+	"nandsrcaddr=0x280000\0" \
+		"nandboot=echo Booting from nand ...; " \
+		"run nandargs; " \
+		"nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
+		"bootm ${loadaddr}\0" \
+	"nandimgsize=0x500000\0"
+#else
+#define NANDARGS ""
+#endif
 
-/* set to negative value for no autoboot */
-#define CONFIG_BOOTDELAY		1
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x80200000\0" \
 	"fdtaddr=0x80F80000\0" \
 	"fdt_high=0xffffffff\0" \
+	"boot_fdt=try\0" \
 	"rdaddr=0x81000000\0" \
 	"bootdir=/boot\0" \
 	"bootfile=uImage\0" \
 	"fdtfile=undefined\0" \
 	"console=ttyO0,115200n8\0" \
 	"optargs=\0" \
-	"mtdids=" MTDIDS_DEFAULT "\0" \
-	"mtdparts=" MTDPARTS_DEFAULT "\0" \
 	"dfu_alt_info_mmc=" DFU_ALT_INFO_MMC "\0" \
 	"dfu_alt_info_emmc=rawemmc mmc 0 3751936\0" \
-	"dfu_alt_info_nand=" DFU_ALT_INFO_NAND "\0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 ro\0" \
 	"mmcrootfstype=ext4 rootwait\0" \
 	"bootpart=0:2\0" \
-	"nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
-	"nandrootfstype=ubifs rootwait=1\0" \
-	"nandsrcaddr=0x280000\0" \
-	"nandimgsize=0x500000\0" \
 	"rootpath=/export/rootfs\0" \
 	"nfsopts=nolock\0" \
 	"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
@@ -86,10 +82,6 @@
 		"${optargs} " \
 		"root=${mmcroot} " \
 		"rootfstype=${mmcrootfstype}\0" \
-	"nandargs=setenv bootargs console=${console} " \
-		"${optargs} " \
-		"root=${nandroot} " \
-		"rootfstype=${nandrootfstype}\0" \
 	"spiroot=/dev/mtdblock4 rw\0" \
 	"spirootfstype=jffs2\0" \
 	"spisrcaddr=0xe0000\0" \
@@ -115,13 +107,33 @@
 	"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
 	"loaduimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
 	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
-	"mmcboot=echo Booting from mmc ...; " \
-		"run mmcargs; " \
-		"bootm ${loadaddr} - ${fdtaddr}\0" \
-	"nandboot=echo Booting from nand ...; " \
-		"run nandargs; " \
-		"nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
-		"bootm ${loadaddr}\0" \
+	"mmcloados=run mmcargs; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if run loadfdt; then " \
+				"bootm ${loadaddr} - ${fdtaddr}; " \
+			"else " \
+				"if test ${boot_fdt} = try; then " \
+					"bootm; " \
+				"else " \
+					"echo WARN: Cannot load the DT; " \
+				"fi; " \
+			"fi; " \
+		"else " \
+			"bootm; " \
+		"fi;\0" \
+	"mmcboot=mmc dev ${mmcdev}; " \
+		"if mmc rescan; then " \
+			"echo SD/MMC found on device ${mmcdev};" \
+			"if run loadbootenv; then " \
+				"echo Loaded environment from ${bootenv};" \
+				"run importbootenv;" \
+			"fi;" \
+			"if test -n $uenvcmd; then " \
+				"echo Running uenvcmd ...;" \
+				"run uenvcmd;" \
+			"fi;" \
+			"run mmcloados;" \
+		"fi;\0" \
 	"spiboot=echo Booting from spi ...; " \
 		"run spiargs; " \
 		"sf probe ${spibusno}:0; " \
@@ -147,83 +159,23 @@
 		"if test $board_name = A335X_SK; then " \
 			"setenv fdtfile am335x-evmsk.dtb; fi; " \
 		"if test $fdtfile = undefined; then " \
-			"echo WARNING: Could not determine device tree to use; fi; \0"
+			"echo WARNING: Could not determine device tree to use; fi; \0" \
+	NANDARGS
 #endif
 
 #define CONFIG_BOOTCOMMAND \
 	"run findfdt; " \
-	"mmc dev ${mmcdev}; if mmc rescan; then " \
-		"echo SD/MMC found on device ${mmcdev};" \
-		"if run loadbootenv; then " \
-			"echo Loaded environment from ${bootenv};" \
-			"run importbootenv;" \
-		"fi;" \
-		"if test -n $uenvcmd; then " \
-			"echo Running uenvcmd ...;" \
-			"run uenvcmd;" \
-		"fi;" \
-		"if run loaduimage; then " \
-			"run loadfdt;" \
-			"run mmcboot;" \
-		"fi;" \
-	"else " \
-		"run nandboot;" \
-	"fi;" \
-
-/* Clock Defines */
-#define V_OSCK				24000000  /* Clock output from T2 */
-#define V_SCLK				(V_OSCK)
-
-#define CONFIG_CMD_ECHO
-
-/* We set the max number of command args high to avoid HUSH bugs. */
-#define CONFIG_SYS_MAXARGS		64
-
-/* Console I/O Buffer Size */
-#define CONFIG_SYS_CBSIZE		512
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
-					+ sizeof(CONFIG_SYS_PROMPT) + 16)
-
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-
-/*
- * memtest works on 8 MB in DRAM after skipping 32MB from
- * start addr of ram disk
- */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
-					+ (8 * 1024 * 1024))
-
-#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
-
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_CMD_MMC
-#define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_FAT
-#define CONFIG_FAT_WRITE
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-#define CONFIG_CMD_FS_GENERIC
-
-#define CONFIG_SPI
-#define CONFIG_OMAP3_SPI
-#define CONFIG_MTD_DEVICE
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_WINBOND
-#define CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED		(24000000)
+	"run mmcboot;" \
+	"setenv mmcdev 1; " \
+	"setenv bootpart 1:2; " \
+	"run mmcboot;" \
+	"run nandboot;"
 
 /* USB Composite download gadget - g_dnl */
 #define CONFIG_USB_GADGET
 #define CONFIG_USBDOWNLOAD_GADGET
 
 /* USB TI's IDs */
-#define CONFIG_USBD_HS
 #define CONFIG_G_DNL_VENDOR_NUM 0x0403
 #define CONFIG_G_DNL_PRODUCT_NUM 0xBD00
 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
@@ -231,129 +183,50 @@
 /* USB Device Firmware Update support */
 #define CONFIG_DFU_FUNCTION
 #define CONFIG_DFU_MMC
-#define CONFIG_DFU_NAND
 #define CONFIG_CMD_DFU
 #define DFU_ALT_INFO_MMC \
 	"boot part 0 1;" \
 	"rootfs part 0 2;" \
 	"MLO fat 0 1;" \
 	"MLO.raw mmc 100 100;" \
-	"u-boot.img.raw mmc 300 3C0;" \
+	"u-boot.img.raw mmc 300 400;" \
+	"spl-os-args.raw mmc 80 80;" \
+	"spl-os-image.raw mmc 900 2000;" \
+	"spl-os-args fat 0 1;" \
+	"spl-os-image fat 0 1;" \
 	"u-boot.img fat 0 1;" \
 	"uEnv.txt fat 0 1"
+#ifdef CONFIG_NAND
+#define CONFIG_DFU_NAND
 #define DFU_ALT_INFO_NAND \
 	"SPL part 0 1;" \
 	"SPL.backup1 part 0 2;" \
 	"SPL.backup2 part 0 3;" \
 	"SPL.backup3 part 0 4;" \
 	"u-boot part 0 5;" \
-	"kernel part 0 7;" \
-	"rootfs part 0 8"
-
- /* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
-#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
-#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
-						GENERATED_GBL_DATA_SIZE)
- /* Platform/Board specific defs */
-#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000	/* 1ms clock */
+	"u-boot-spl-os part 0 6;" \
+	"kernel part 0 8;" \
+	"rootfs part 0 9"
+#endif
 
 /* NS16550 Configuration */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
-#define CONFIG_SYS_NS16550_CLK		(48000000)
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
 #define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
 #define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
 #define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
 #define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
 #define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
+#define CONFIG_BAUDRATE			115200
 
 /* I2C Configuration */
-#define CONFIG_I2C
-#define CONFIG_CMD_I2C
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED		100000
-#define CONFIG_SYS_I2C_SLAVE		1
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_DRIVER_OMAP24XX_I2C
 #define CONFIG_CMD_EEPROM
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 
-#define CONFIG_OMAP_GPIO
-
-#define CONFIG_BAUDRATE		115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
-4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
-
-/* CPU */
-#define CONFIG_ARCH_CPU_INIT
-
-#define CONFIG_ENV_OVERWRITE		1
-#define CONFIG_SYS_CONSOLE_INFO_QUIET
-
-#define CONFIG_ENV_IS_NOWHERE
-
-/* Defines for SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_FRAMEWORK
-/*
- * Place the image at the start of the ROM defined image space.
- * We limit our size to the ROM-defined downloaded image area, and use the
- * rest of the space for stack.
- */
-#define CONFIG_SPL_TEXT_BASE		0x402F0400
-#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
-#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
-
-#define CONFIG_SPL_OS_BOOT
-
-#define CONFIG_SPL_BSS_START_ADDR	0x80a00000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
-
-#ifdef CONFIG_SPL_OS_BOOT
-/* fat */
-#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME		"uImage"
-#define CONFIG_SPL_FAT_LOAD_ARGS_NAME		"args"
-#define CONFIG_SYS_SPL_ARGS_ADDR		(PHYS_DRAM_1 + 0x100)
-
-/* raw mmc */
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x500 /* address 0xa0000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x8   /* address 0x1000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	8     /* 4KB */
-
-/* nand */
-#define CONFIG_CMD_SPL_NAND_OFS			0x240000 /* end of u-boot */
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS		0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE		0x1000
-
-/* spl export command */
-#define CONFIG_CMD_SPL
-#endif
-
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
+/* SPL */
+#ifndef CONFIG_NOR_BOOT
 #define CONFIG_SPL_YMODEM_SUPPORT
 #define CONFIG_SPL_NET_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
@@ -364,16 +237,11 @@
 #define CONFIG_SPL_SPI_LOAD
 #define CONFIG_SPL_SPI_BUS		0
 #define CONFIG_SPL_SPI_CS		0
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x80000
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
 #define CONFIG_SPL_MUSB_NEW_SUPPORT
 #define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/am33xx/u-boot-spl.lds"
 
-#define CONFIG_SPL_BOARD_INIT
-#define CONFIG_SPL_NAND_AM33XX_BCH
-#define CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_SPL_NAND_BASE
-#define CONFIG_SPL_NAND_DRIVERS
-#define CONFIG_SPL_NAND_ECC
+#ifdef CONFIG_NAND
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 					 CONFIG_SYS_NAND_PAGE_SIZE)
@@ -393,24 +261,16 @@
 #define CONFIG_SYS_NAND_ECCBYTES	14
 
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
-
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#endif
+#endif
 
 /*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE		0x80800000
-#define CONFIG_SYS_SPL_MALLOC_START	0x80a08000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
-
-/* Since SPL did pll and ddr initialization for us,
- * we don't need to do it twice.
+ * For NOR boot, we must set this to the start of where NOR is mapped
+ * in memory.
  */
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_SYS_TEXT_BASE		0x08000000
 #endif
 
 /*
@@ -450,51 +310,50 @@
 #endif
 
 /*
- * Default to using SPI for environment, etc.  We have multiple copies
- * of SPL as the ROM will check these locations.
- * 0x0 - 0x20000 : First copy of SPL
- * 0x20000 - 0x40000 : Second copy of SPL
- * 0x40000 - 0x60000 : Third copy of SPL
- * 0x60000 - 0x80000 : Fourth copy of SPL
- * 0x80000 - 0xDF000 : U-Boot
- * 0xDF000 - 0xE0000 : U-Boot Environment
- * 0xE0000 - 0x442000 : Linux Kernel
+ * Default to using SPI for environment, etc.
+ * 0x000000 - 0x020000 : SPL (128KiB)
+ * 0x020000 - 0x0A0000 : U-Boot (512KiB)
+ * 0x0A0000 - 0x0BFFFF : First copy of U-Boot Environment (128KiB)
+ * 0x0C0000 - 0x0DFFFF : Second copy of U-Boot Environment (128KiB)
+ * 0x0E0000 - 0x442000 : Linux Kernel
  * 0x442000 - 0x800000 : Userland
  */
 #if defined(CONFIG_SPI_BOOT)
-# undef CONFIG_ENV_IS_NOWHERE
-# define CONFIG_ENV_IS_IN_SPI_FLASH
-# define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
-# define CONFIG_ENV_OFFSET		(892 << 10) /* 892 KiB in */
-# define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */
-#endif /* SPI support */
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SECT_SIZE		(4 << 10) /* 4 KB sectors */
+#define CONFIG_ENV_OFFSET		(768 << 10) /* 768 KiB in */
+#define CONFIG_ENV_OFFSET_REDUND	(896 << 10) /* 896 KiB in */
+#define MTDIDS_DEFAULT			"nor0=m25p80-flash.0"
+#define MTDPARTS_DEFAULT		"mtdparts=m25p80-flash.0:128k(SPL)," \
+					"512k(u-boot),128k(u-boot-env1)," \
+					"128k(u-boot-env2),3464k(kernel)," \
+					"-(rootfs)"
+#elif defined(CONFIG_EMMC_BOOT)
+#undef CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV		1
+#define CONFIG_SYS_MMC_ENV_PART		2
+#endif
 
-/* Unsupported features */
-#undef CONFIG_USE_IRQ
+/* SPI flash. */
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_SPEED		24000000
 
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_PING
-#define CONFIG_DRIVER_TI_CPSW
-#define CONFIG_MII
-#define CONFIG_BOOTP_DEFAULT
-#define CONFIG_BOOTP_DNS
-#define CONFIG_BOOTP_DNS2
-#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_NET_MULTI
+/* Network. */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ADDR			0
 #define CONFIG_PHY_SMSC
 
-#define CONFIG_NAND
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND
-#define CONFIG_CMD_MTDPARTS
+#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
+#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:128k(SPL)," \
 					"128k(SPL.backup1)," \
@@ -502,19 +361,49 @@
 					"128k(SPL.backup3),1792k(u-boot)," \
 					"128k(u-boot-spl-os)," \
 					"128k(u-boot-env),5m(kernel),-(rootfs)"
-#define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT	1
-#define CONFIG_SYS_NAND_BASE		(0x08000000)	/* physical address */
-							/* to access nand at */
-							/* CS0 */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND
-							   devices */
-#if !defined(CONFIG_SPI_BOOT)
-#undef CONFIG_ENV_IS_NOWHERE
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
 #endif
 #endif
 
+/*
+ * NOR Size = 16 MiB
+ * Number of Sectors/Blocks = 128
+ * Sector Size = 128 KiB
+ * Word length = 16 bits
+ * Default layout:
+ * 0x000000 - 0x07FFFF : U-Boot (512 KiB)
+ * 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
+ * 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
+ * 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
+ * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
+ */
+#if defined(CONFIG_NOR)
+#undef CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_MTD
+#define CONFIG_SYS_MAX_FLASH_SECT	128
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+#define CONFIG_SYS_FLASH_BASE		(0x08000000)
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE		(128 << 10)	/* 128 KiB */
+#define CONFIG_ENV_OFFSET		(512 << 10)	/* 512 KiB */
+#define CONFIG_ENV_OFFSET_REDUND	(768 << 10)	/* 768 KiB */
+#define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
+					"512k(u-boot)," \
+					"128k(u-boot-env1)," \
+					"128k(u-boot-env2)," \
+					"4m(kernel),-(rootfs)"
+#endif
+#endif  /* NOR support */
+
 #endif	/* ! __CONFIG_AM335X_EVM_H */
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 9bf283aba34..1fd2508fe97 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -19,6 +19,7 @@
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_AM3517CRANE	1	/* working with CRANEBOARD */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
 
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 5c6169771c1..65008781216 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -19,6 +19,7 @@
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_AM3517EVM	1	/* working with AM3517EVM */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
 
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
new file mode 100644
index 00000000000..5c802a15467
--- /dev/null
+++ b/include/configs/am43xx_evm.h
@@ -0,0 +1,135 @@
+/*
+ * am43xx_evm.h
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_AM43XX_EVM_H
+#define __CONFIG_AM43XX_EVM_H
+
+#define CONFIG_AM43XX
+#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
+
+#include <asm/arch/omap.h>
+
+#define CONFIG_DMA_COHERENT
+#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
+
+#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
+#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
+#define CONFIG_SYS_PROMPT		"U-Boot# "
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* commands to include */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_VERSION_VARIABLE
+
+/* set to negative value for no autoboot */
+#define CONFIG_BOOTDELAY		1
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+/* Clock Defines */
+#define V_OSCK				24000000  /* Clock output from T2 */
+#define V_SCLK				(V_OSCK)
+
+#define CONFIG_CMD_ECHO
+
+/* max number of command args */
+#define CONFIG_SYS_MAXARGS		64
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		512
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
+					+ sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+ /* Physical Memory Map */
+#define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
+#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
+#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
+						GENERATED_GBL_DATA_SIZE)
+/* Platform/Board specific defs */
+#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
+
+#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
+#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ			1000
+
+/* NS16550 Configuration */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		(48000000)
+#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
+
+#define CONFIG_BAUDRATE		115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
+4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
+
+/* CPU */
+#define CONFIG_ARCH_CPU_INIT
+
+#define CONFIG_ENV_OVERWRITE		1
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+#define CONFIG_ENV_IS_NOWHERE
+
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80800000
+
+#ifndef	CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE		0x402F0400
+#define CONFIG_SPL_MAX_SIZE		(101 * 1024)
+#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
+
+#define CONFIG_SPL_BSS_START_ADDR	0x80a00000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SYS_SPL_MALLOC_START	0x80a08000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
+/* Unsupported features */
+#undef CONFIG_USE_IRQ
+
+#endif	/* __CONFIG_AM43XX_EVM_H */
diff --git a/include/configs/apx4devkit.h b/include/configs/apx4devkit.h
index 8561a248c41..d1f18bc45c3 100644
--- a/include/configs/apx4devkit.h
+++ b/include/configs/apx4devkit.h
@@ -11,34 +11,16 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIGS_APX4DEVKIT_H__
+#define __CONFIGS_APX4DEVKIT_H__
 
-/* SoC configurations */
+/* System configurations */
 #define CONFIG_MX28				/* i.MX28 SoC */
-#define CONFIG_MXS_GPIO				/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
-
 #define MACH_TYPE_APX4DEVKIT	3712
 #define CONFIG_MACH_TYPE	MACH_TYPE_APX4DEVKIT
 
-#include <asm/arch/regs-base.h>
-
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_ARCH_MISC_INIT
-
-/* SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
 /* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
@@ -58,78 +40,26 @@
 #define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_USB
 
-/* Memory configurations */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 
-/* Point initial SP in SRAM so SPL can use it too. */
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE		0x40000100
 
+/* Environment */
 #define CONFIG_ENV_OVERWRITE
-
-/* U-Boot general configurations */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT		"=> "
-#define CONFIG_SYS_CBSIZE		1024	/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS		32	/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE			/* U-Boot version */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc. */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_OF_LIBFDT
 #define CONFIG_ENV_IS_IN_NAND
 
-/* Serial Driver */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-/* DMA */
-#define CONFIG_APBH_DMA
-
-/* MMC Driver */
-#ifdef CONFIG_ENV_IS_IN_MMC
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_ENV_OFFSET		(256 * 1024)
 #define CONFIG_ENV_SIZE			(16 * 1024)
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #endif
 
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_MXS_MMC
-#endif
-
-/* NAND Driver */
-#ifdef CONFIG_ENV_IS_IN_NAND
+/* Environment is in NAND */
+#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
 #define CONFIG_ENV_SIZE			(128 * 1024)
 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
@@ -139,12 +69,8 @@
 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
 #endif
 
+/* UBI and NAND partitioning */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x60000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
 #define CONFIG_CMD_MTDPARTS
@@ -159,43 +85,30 @@
 #define MTDPARTS_DEFAULT		""
 #endif
 
-/* Ethernet on SOC (FEC) */
+/* FEC Ethernet on SoC */
 #ifdef CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
 #define CONFIG_NET_MULTI
 #define CONFIG_ETHPRIME			"FEC"
-#define CONFIG_FEC_MXC
 #define CONFIG_FEC_MXC_PHYADDR		0
 #define IMX_FEC_BASE			MXS_ENET0_BASE
-#define CONFIG_MII
-#define CONFIG_FEC_XCV_TYPE		RMII
 #endif
 
 /* USB */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_MXS_PORT1
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
-#define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #endif
 
-/* I2C */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_I2C_MXS
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED		400000
-#endif
 
 /* RTC */
-#if defined(CONFIG_CMD_DATE)
+#ifdef CONFIG_CMD_DATE
 #define CONFIG_RTC_PCF8563
 #define CONFIG_SYS_I2C_RTC_ADDR		0x51
 #endif
 
 /* Boot Linux */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTDELAY		1
 #define CONFIG_BOOTFILE			"uImage"
 #define CONFIG_BOOTCOMMAND		"run bootcmd_nand"
@@ -225,4 +138,7 @@
 		"ext2load mmc 0:2 41000000 boot/uImage && bootm 41000000\0" \
 ""
 
-#endif /* __CONFIG_H */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_APX4DEVKIT_H__ */
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 39a216e8352..bc5b66c6dc7 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -24,6 +24,7 @@
 #define CONFIG_OMAP34XX	/* which is a 34XX */
 #define CONFIG_OMAP_GPIO
 #define CONFIG_CM_T3X	/* working with CM-T35 and CM-T3730 */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SYS_TEXT_BASE	0x80008000
 
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 513121ae642..cb79b4ef43b 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -21,6 +21,7 @@
 #define CONFIG_OMAP3_DEVKIT8000	1	/* working with DevKit8000 */
 #define CONFIG_MACH_TYPE	MACH_TYPE_DEVKIT8000
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 /*
  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
diff --git a/include/configs/dig297.h b/include/configs/dig297.h
index bf91625079b..30e39087c76 100644
--- a/include/configs/dig297.h
+++ b/include/configs/dig297.h
@@ -30,6 +30,7 @@
 #define CONFIG_OMAP		/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		/* which is a 34XX */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SYS_TEXT_BASE	0x80008000
 
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 70b204f645e..58786ffa912 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -12,20 +12,36 @@
 #ifndef __CONFIG_DRA7XX_EVM_H
 #define __CONFIG_DRA7XX_EVM_H
 
-/* High Level Configuration Options */
-#define CONFIG_DRA7XX		/* in a TI DRA7XX core */
-#define CONFIG_ENV_IS_NOWHERE		/* For now. */
-
-#include <configs/omap5_common.h>
+#define CONFIG_DRA7XX
 
-#define CONFIG_SYS_PROMPT		"DRA752 EVM # "
+#define CONFIG_ENV_IS_NOWHERE		/* For now. */
 
+#define CONSOLEDEV			"ttyO0"
 #define CONFIG_CONS_INDEX		1
 #define CONFIG_SYS_NS16550_COM1		UART1_BASE
 #define CONFIG_BAUDRATE			115200
 
 #define CONFIG_SYS_OMAP_ABE_SYSCK
 
-#define CONSOLEDEV		"ttyO0"
+#include <configs/omap5_common.h>
+
+/* CPSW Ethernet */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT         10
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_GIGE
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ADDR			2
 
 #endif /* __CONFIG_DRA7XX_EVM_H */
diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index e7459c179ba..a5743d63df5 100644
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -7,14 +7,18 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_L2_OFF
+#define CONFIG_SYS_THUMB_BUILD
 
 #define CONFIG_SYS_NO_FLASH
 #define CFG_HZ				1000
 #define CONFIG_SYS_HZ			CFG_HZ
 
 #define CONFIG_OF_LIBFDT
+#define CONFIG_OF_BOARD_SETUP
 #define CONFIG_FIT
+#define CONFIG_SUPPORT_RAW_INITRD
 #define CONFIG_SYS_BOOTMAPSZ		(16 << 20)
 
 /*
@@ -27,7 +31,7 @@
 #define CONFIG_PL01x_PORTS		{ (void *)(0xFFF36000) }
 #define CONFIG_CONS_INDEX		0
 
-#define CONFIG_BAUDRATE			38400
+#define CONFIG_BAUDRATE			115200
 
 #define CONFIG_BOOTCOUNT_LIMIT
 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
@@ -43,6 +47,7 @@
 					CONFIG_SYS_SCSI_MAX_LUN)
 
 #define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
 
 #define CONFIG_CALXEDA_XGMAC
 
@@ -57,31 +62,42 @@
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTZ
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_MEMORY
 #define CONFIG_CMD_LOADS
 #define CONFIG_CMD_SCSI
 #define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
 #define CONFIG_CMD_PXE
 #define CONFIG_MENU
 
 #define CONFIG_BOOTDELAY		2
+#define CONFIG_BOOT_RETRY_TIME		-1
+#define CONFIG_RESET_TO_RETRY
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n", bootdelay
+
 /*
  * Miscellaneous configurable options
  */
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_LONGHELP		/* undef to save memory		 */
-#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
 #define CONFIG_SYS_MAXARGS		16	/* max number of cmd args */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_PROMPT		"Highbank #"
+#define CONFIG_SYS_HUSH_PARSER
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
 					 sizeof(CONFIG_SYS_PROMPT)+16)
 
 #define CONFIG_SYS_LOAD_ADDR		0x800000
+#define CONFIG_SYS_64BIT_LBA
+
 
 /*-----------------------------------------------------------------------
  * Physical Memory Map
diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h
index 12f28f82a8f..e08fc14b3ad 100644
--- a/include/configs/igep0033.h
+++ b/include/configs/igep0033.h
@@ -16,6 +16,7 @@
 
 #define CONFIG_AM33XX
 #define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
 
 #include <asm/arch/omap.h>
 
@@ -27,10 +28,6 @@
 #define V_OSCK				24000000  /* Clock output from T2 */
 #define V_SCLK				(V_OSCK)
 
-/* DMA defines */
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
-
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
 #define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
@@ -41,6 +38,9 @@
 /* Display cpuinfo */
 #define CONFIG_DISPLAY_CPUINFO
 
+/* Flattened Device Tree */
+#define CONFIG_OF_LIBFDT
+
 /* Commands to include */
 #include <config_cmd_default.h>
 
@@ -59,48 +59,48 @@
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
 
-/*
- * Because the issues explained in doc/README.memory-test, the "mtest command
- * is considered deprecated. It should not be enabled in most normal ports of
- * U-Boot.
- */
-#undef CONFIG_CMD_MEMTEST
+/* Make the verbose messages from UBI stop printing */
+#define CONFIG_UBI_SILENCE_MSG
+#define CONFIG_UBIFS_SILENCE_MSG
 
 #define CONFIG_BOOTDELAY		1	/* negative for no autoboot */
 #define CONFIG_ENV_VARS_UBOOT_CONFIG
 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	"loadaddr=0x80200000\0" \
-	"rdaddr=0x81000000\0" \
-	"bootfile=/boot/uImage\0" \
+	"loadaddr=0x80F80000\0" \
+	"dtbaddr=0x80200000\0" \
+	"bootdir=/boot\0" \
+	"bootfile=zImage\0" \
+	"dtbfile=am335x-base0033.dtb\0" \
 	"console=ttyO0,115200n8\0" \
-	"optargs=\0" \
+	"mtdids=" MTDIDS_DEFAULT "\0" \
+	"mtdparts=" MTDPARTS_DEFAULT "\0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 rw\0" \
+	"ubiroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \
 	"mmcrootfstype=ext4 rootwait\0" \
-	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
-	"ramrootfstype=ext2\0" \
+	"ubirootfstype=ubifs rootwait\0" \
 	"mmcargs=setenv bootargs console=${console} " \
-		"${optargs} " \
 		"root=${mmcroot} " \
 		"rootfstype=${mmcrootfstype}\0" \
+	"ubiargs=setenv bootargs console=${console} " \
+		"root=${ubiroot} " \
+		"rootfstype=${ubirootfstype}\0" \
 	"bootenv=uEnv.txt\0" \
 	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
 	"importbootenv=echo Importing environment from mmc ...; " \
-		"env import -t $loadaddr $filesize\0" \
-	"ramargs=setenv bootargs console=${console} " \
-		"${optargs} " \
-		"root=${ramroot} " \
-		"rootfstype=${ramrootfstype}\0" \
-	"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
-	"loaduimagefat=load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
-	"loaduimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
+		"env import -t ${loadaddr} ${filesize}\0" \
+	"mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \
+		"load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
+	"ubiload=ubi part filesystem 2048; ubifsmount ubi0; " \
+		"ubifsload ${loadaddr} ${bootdir}/${bootfile}; " \
+		"ubifsload ${dtbaddr} ${bootdir}/${dtbfile} \0" \
 	"mmcboot=echo Booting from mmc ...; " \
 		"run mmcargs; " \
-		"bootm ${loadaddr}\0" \
-	"ramboot=echo Booting from ramdisk ...; " \
-		"run ramargs; " \
-		"bootm ${loadaddr}\0" \
+		"bootz ${loadaddr} - ${dtbaddr}\0" \
+	"ubiboot=echo Booting from nand (ubifs) ...; " \
+		"run ubiargs; run ubiload; " \
+		"bootz ${loadaddr} - ${dtbaddr}\0" \
 
 #define CONFIG_BOOTCOMMAND \
 	"mmc dev ${mmcdev}; if mmc rescan; then " \
@@ -113,9 +113,11 @@
 			"echo Running uenvcmd ...;" \
 			"run uenvcmd;" \
 		"fi;" \
-		"if run loaduimage; then " \
+		"if run mmcload; then " \
 			"run mmcboot;" \
 		"fi;" \
+	"else " \
+		"run ubiboot;" \
 	"fi;" \
 
 /* Max number of command args */
@@ -131,20 +133,18 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
-#define CONFIG_SYS_HZ			1000 /* 1ms clock */
 
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
-#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
 
-#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
 						GENERATED_GBL_DATA_SIZE)
 /* Platform/Board specific defs */
 #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_HZ			1000	/* 1ms clock */
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550
@@ -153,7 +153,6 @@
 #define CONFIG_SYS_NS16550_CLK		(48000000)
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
 
-#define CONFIG_SERIAL_MULTI
 #define CONFIG_CONS_INDEX		1
 #define CONFIG_BAUDRATE			115200
 
@@ -195,18 +194,21 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_ONFI_DETECTION	1
 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_ENV_OFFSET		0x260000 /* environment starts here */
+#define CONFIG_ENV_OFFSET		0x180000 /* environment starts here */
+#define CONFIG_ENV_ADDR_REDUND		(CONFIG_ENV_OFFSET + CONFIG_SYS_ENV_SECT_SIZE)
+#define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
 
 #define CONFIG_MTD_PARTITIONS
 #define CONFIG_MTD_DEVICE
 #define CONFIG_RBTREE
 #define CONFIG_LZO
 
-#define MTDIDS_DEFAULT			"nand0=nand"
-#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(SPL),"\
-					"1m(U-Boot),128k(U-Boot Env),"\
-					"5m(Kernel),-(File System)"
+#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(spl),"\
+					"1m(uboot),256k(environment),"\
+					"-(filesystem)"
 
 /* Unsupported features */
 #undef CONFIG_USE_IRQ
@@ -264,10 +266,6 @@
 #define CONFIG_SYS_NAND_ECCSIZE		512
 #define CONFIG_SYS_NAND_ECCBYTES	14
 
-#define CONFIG_SYS_NAND_ECCSTEPS	4
-#define	CONFIG_SYS_NAND_ECCTOTAL	(CONFIG_SYS_NAND_ECCBYTES * \
-						CONFIG_SYS_NAND_ECCSTEPS)
-
 #define	CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
diff --git a/include/configs/igep00x0.h b/include/configs/igep00x0.h
index c17267e3adf..722c56652f1 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/igep00x0.h
@@ -18,6 +18,7 @@
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
@@ -97,8 +98,9 @@
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_CACHE
-#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
+#define CONFIG_CMD_EXT4
 #define CONFIG_CMD_FAT		/* FAT support			*/
+#define CONFIG_CMD_FS_GENERIC
 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
 #define CONFIG_CMD_MMC		/* MMC support			*/
 #ifdef CONFIG_BOOT_ONENAND
@@ -136,6 +138,9 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"usbtty=cdc_acm\0" \
 	"loadaddr=0x82000000\0" \
+	"dtbaddr=0x81600000\0" \
+	"bootdir=/boot\0" \
+	"bootfile=zImage\0" \
 	"usbtty=cdc_acm\0" \
 	"console=ttyO2,115200n8\0" \
 	"mpurate=auto\0" \
@@ -163,17 +168,20 @@
 		"omapdss.def_disp=${defaultdisplay} " \
 		"root=${nandroot} " \
 		"rootfstype=${nandrootfstype}\0" \
-	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
+	"loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 	"importbootenv=echo Importing environment from mmc ...; " \
 		"env import -t $loadaddr $filesize\0" \
-	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+	"loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
+	"loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
 	"mmcboot=echo Booting from mmc ...; " \
 		"run mmcargs; " \
-		"bootm ${loadaddr}\0" \
+		"bootz ${loadaddr}\0" \
+	"mmcbootfdt=echo Booting with DT from mmc ...; " \
+		"bootz ${loadaddr} - ${dtbaddr}\0" \
 	"nandboot=echo Booting from onenand ...; " \
 		"run nandargs; " \
 		"onenand read ${loadaddr} 280000 400000; " \
-		"bootm ${loadaddr}\0" \
+		"bootz ${loadaddr}\0" \
 
 #define CONFIG_BOOTCOMMAND \
 	"mmc dev ${mmcdev}; if mmc rescan; then " \
@@ -185,7 +193,12 @@
 			"echo Running uenvcmd ...;" \
 			"run uenvcmd;" \
 		"fi;" \
-		"if run loaduimage; then " \
+		"if run loadzimage; then " \
+			"if test -n $dtbfile; then " \
+				"if run loadfdt; then " \
+					"run mmcbootfdt;" \
+				"fi;" \
+			"fi;" \
 			"run mmcboot;" \
 		"fi;" \
 	"fi;" \
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
new file mode 100644
index 00000000000..82d42980075
--- /dev/null
+++ b/include/configs/ipam390.h
@@ -0,0 +1,331 @@
+/*
+ * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * Based on:
+ * U-Boot:include/configs/da850evm.h
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on davinci_dvevm.h. Original Copyrights follow:
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * Board
+ */
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_BARIX_IPAM390
+
+/*
+ * SoC Configuration
+ */
+#define CONFIG_MACH_DAVINCI_DA850_EVM
+#define CONFIG_ARM926EJS		/* arm926ejs CPU core */
+#define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_SOC_DA850		/* TI DA850 SoC */
+#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
+#define CONFIG_SYS_OSCIN_FREQ		24000000
+#define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
+#define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
+#define CONFIG_SYS_HZ			1000
+#define CONFIG_SYS_DA850_PLL_INIT
+#define CONFIG_SYS_DA850_DDR_INIT
+#define CONFIG_SYS_TEXT_BASE		0xc1080000
+
+/*
+ * Memory Info
+ */
+#define CONFIG_SYS_MALLOC_LEN	(0x10000 + 1*1024*1024) /* malloc() len */
+#define PHYS_SDRAM_1		DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */
+#define PHYS_SDRAM_1_SIZE	(128 << 20) /* SDRAM size 128MB */
+#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
+
+/* memtest start addr */
+#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
+
+/* memtest will be run on 16MB */
+#define CONFIG_SYS_MEMTEST_END	(CONFIG_SYS_MEMTEST_START + 16 * 1024 * 1024)
+
+#define CONFIG_NR_DRAM_BANKS	1 /* we have 1 bank of DRAM */
+
+#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (	\
+	DAVINCI_SYSCFG_SUSPSRC_TIMER0 |		\
+	DAVINCI_SYSCFG_SUSPSRC_UART2 |		\
+	DAVINCI_SYSCFG_SUSPSRC_UART0 |		\
+	DAVINCI_SYSCFG_SUSPSRC_EMAC)
+
+/*
+ * PLL configuration
+ */
+#define CONFIG_SYS_DV_CLKMODE          0
+#define CONFIG_SYS_DA850_PLL0_POSTDIV  1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV1  0x8000
+#define CONFIG_SYS_DA850_PLL0_PLLDIV2  0x8001
+#define CONFIG_SYS_DA850_PLL0_PLLDIV3  0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV4  0x8003
+#define CONFIG_SYS_DA850_PLL0_PLLDIV5  0x8002
+#define CONFIG_SYS_DA850_PLL0_PLLDIV6  CONFIG_SYS_DA850_PLL0_PLLDIV1
+#define CONFIG_SYS_DA850_PLL0_PLLDIV7  0x8005
+
+#define CONFIG_SYS_DA850_PLL1_POSTDIV  1
+#define CONFIG_SYS_DA850_PLL1_PLLDIV1  0x8000
+#define CONFIG_SYS_DA850_PLL1_PLLDIV2  0x8001
+#define CONFIG_SYS_DA850_PLL1_PLLDIV3  0x8002
+
+#define CONFIG_SYS_DA850_PLL0_PLLM     24
+#define CONFIG_SYS_DA850_PLL1_PLLM     24
+
+/*
+ * DDR2 memory configuration
+ */
+#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \
+					DV_DDR_PHY_EXT_STRBEN | \
+					(0x2 << DV_DDR_PHY_RD_LATENCY_SHIFT))
+#define CONFIG_SYS_DA850_DDR2_SDRCR	0x00000498
+
+#define CONFIG_SYS_DA850_DDR2_SDBCR2	0x00000004
+#define CONFIG_SYS_DA850_DDR2_PBBPR	0x00000020
+
+
+#define CONFIG_SYS_DA850_DDR2_SDTIMR (		\
+	(13 << DV_DDR_SDTMR1_RFC_SHIFT) |	\
+	(2 << DV_DDR_SDTMR1_RP_SHIFT) |		\
+	(2 << DV_DDR_SDTMR1_RCD_SHIFT) |	\
+	(2 << DV_DDR_SDTMR1_WR_SHIFT) |		\
+	(5 << DV_DDR_SDTMR1_RAS_SHIFT) |	\
+	(8 << DV_DDR_SDTMR1_RC_SHIFT) |		\
+	(1 << DV_DDR_SDTMR1_RRD_SHIFT) |	\
+	(1 << DV_DDR_SDTMR1_WTR_SHIFT))
+
+#define CONFIG_SYS_DA850_DDR2_SDTIMR2 (		\
+	(8 << DV_DDR_SDTMR2_RASMAX_SHIFT) |	\
+	(2 << DV_DDR_SDTMR2_XP_SHIFT) |		\
+	(0 << DV_DDR_SDTMR2_ODT_SHIFT) |	\
+	(14 << DV_DDR_SDTMR2_XSNR_SHIFT) |	\
+	(0xc7 << DV_DDR_SDTMR2_XSRD_SHIFT) |	\
+	(1 << DV_DDR_SDTMR2_RTP_SHIFT) |	\
+	(2 << DV_DDR_SDTMR2_CKE_SHIFT))
+
+#define CONFIG_SYS_DA850_DDR2_SDBCR (		\
+	(1 << DV_DDR_SDCR_DDR2EN_SHIFT) |	\
+	(1 << DV_DDR_SDCR_DDRDRIVE0_SHIFT) |	\
+	(1 << DV_DDR_SDCR_DDREN_SHIFT) |	\
+	(1 << DV_DDR_SDCR_SDRAMEN_SHIFT) |	\
+	(1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) |	\
+	(2 << DV_DDR_SDCR_CL_SHIFT) |	\
+	(3 << DV_DDR_SDCR_IBANK_SHIFT) |	\
+	(2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
+
+#define CONFIG_SYS_DA850_CS3CFG	(DAVINCI_ABCR_WSETUP(2)	| \
+				DAVINCI_ABCR_WSTROBE(2)	| \
+				DAVINCI_ABCR_WHOLD(1)	| \
+				DAVINCI_ABCR_RSETUP(1)	| \
+				DAVINCI_ABCR_RSTROBE(4)	| \
+				DAVINCI_ABCR_RHOLD(0)	| \
+				DAVINCI_ABCR_TA(1)	| \
+				DAVINCI_ABCR_ASIZE_8BIT)
+
+
+/*
+ * Serial Driver info
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	-4	/* NS16550 register size */
+#define CONFIG_SYS_NS16550_COM1	DAVINCI_UART0_BASE /* Base address of UART0 */
+#define CONFIG_SYS_NS16550_CLK	clk_get(DAVINCI_UART2_CLKID)
+#define CONFIG_CONS_INDEX	1		/* use UART0 for console */
+#define CONFIG_BAUDRATE		115200		/* Default baud rate */
+
+/*
+ * Flash & Environment
+ */
+#define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
+#define CONFIG_ENV_OFFSET		0x0 /* Block 0--not used by bootcode */
+#define CONFIG_ENV_SIZE			(128 << 10)
+#define	CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
+#define	CONFIG_SYS_NAND_PAGE_2K
+#define CONFIG_SYS_NAND_CS		3
+#define CONFIG_SYS_NAND_BASE		DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
+#define CONFIG_SYS_NAND_MASK_CLE		0x10
+#define CONFIG_SYS_NAND_MASK_ALE		0x8
+#undef CONFIG_SYS_NAND_HW_ECC
+#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
+#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_SIZE	(2 << 10)
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x120000
+#define CONFIG_SYS_NAND_U_BOOT_DST	0xc1080000
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
+#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP	(CONFIG_SYS_NAND_U_BOOT_DST - \
+					CONFIG_SYS_NAND_U_BOOT_SIZE - \
+					CONFIG_SYS_MALLOC_LEN -       \
+					GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_NAND_ECCPOS		{				\
+				24, 25, 26, 27, 28, \
+				29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
+				39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
+				49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
+				59, 60, 61, 62, 63 }
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	10
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_NAND_LOAD
+
+/*
+ * Network & Ethernet Configuration
+ */
+#ifdef CONFIG_DRIVER_TI_EMAC
+#define CONFIG_DRIVER_TI_EMAC_USE_RMII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT	10
+#endif
+
+/*
+ * U-Boot general configuration
+ */
+#define CONFIG_MISC_INIT_R
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOOTFILE		"uImage" /* Boot file name */
+#define CONFIG_SYS_PROMPT	"U-Boot > " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE	1024 /* Console I/O Buffer Size	*/
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
+#define CONFIG_SYS_MAXARGS	16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
+#define CONFIG_SYS_LOAD_ADDR	(PHYS_SDRAM_1 + 0x700000)
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/*
+ * Linux Information
+ */
+#define LINUX_BOOT_PARAM_ADDR	(PHYS_SDRAM_1 + 0x100)
+#define CONFIG_HWCONFIG		/* enable hwconfig */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS		\
+	"mem=128M console=ttyS0,115200n8 root=/dev/mtdblock0p4 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"hwconfig=dsp:wake=yes\0" \
+	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"	\
+	"mtdids=" MTDIDS_DEFAULT "\0"				\
+	"mtdparts=" MTDPARTS_DEFAULT "\0"			\
+	"setbootparms=nand read c0100000 200000 400000;"	\
+		"spl export atags c0100000;"			\
+		"nand erase.part bootparms;"			\
+		"nand write c0000100 180000 20000\0"		\
+	"\0"
+
+/*
+ * U-Boot commands
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_MEMORY
+
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
+#ifndef CONFIG_DRIVER_TI_EMAC
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PING
+#endif
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_LZO
+#define CONFIG_RBTREE
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+
+#define MTDIDS_NAME_STR		"davinci_nand.0"
+#define MTDIDS_DEFAULT		"nand0=" MTDIDS_NAME_STR
+#define MTDPARTS_DEFAULT	"mtdparts=" MTDIDS_NAME_STR ":" \
+					"128k(u-boot-env),"	\
+					"1408k(u-boot),"	\
+					"128k(bootparms),"	\
+					"384k(factory-info),"	\
+					"4M(kernel),"	\
+					"-(rootfs)"
+
+/* defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SYS_TEXT_BASE - \
+						CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_LDSCRIPT	"board/$(BOARDDIR)/u-boot-spl-ipam390.lds"
+#define CONFIG_SPL_STACK	0x8001ff00
+#define CONFIG_SPL_TEXT_BASE	0x80000000
+#define CONFIG_SPL_MAX_SIZE	0x20000
+#define CONFIG_SPL_MAX_FOOTPRINT	32768
+
+/* additions for new relocation code, must added to all boards */
+#define CONFIG_SYS_SDRAM_BASE		0xc0000000
+
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
+					GENERATED_GBL_DATA_SIZE)
+
+/* add FALCON boot mode */
+#define CONFIG_CMD_SPL
+#define CONFIG_SPL_OS_BOOT
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000
+#define CONFIG_SYS_SPL_ARGS_ADDR	LINUX_BOOT_PARAM_ADDR
+#define CONFIG_CMD_SPL_NAND_OFS		0x00180000
+#define CONFIG_CMD_SPL_WRITE_SIZE	0x400
+
+/* GPIO support */
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_DA8XX_GPIO
+#define CONFIG_IPAM390_GPIO_BOOTMODE	((16 * 7) + 14)
+
+#define CONFIG_SHOW_BOOT_PROGRESS
+#define CONFIG_IPAM390_GPIO_LED_RED	((16 * 7) + 11)
+#define CONFIG_IPAM390_GPIO_LED_GREEN	((16 * 7) + 12)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index fd3ae028dc3..eba875954df 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -4,43 +4,17 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+ 
  */
-#ifndef __M28EVK_CONFIG_H__
-#define __M28EVK_CONFIG_H__
+#ifndef __CONFIGS_M28EVK_H__
+#define __CONFIGS_M28EVK_H__
 
-/*
- * SoC configurations
- */
-#define CONFIG_MX28				/* i.MX28 SoC */
-#define CONFIG_MXS_GPIO				/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
 
-/*
- * Define M28EVK machine type by hand until it lands in mach-types
- */
+/* System configurations */
+#define CONFIG_MX28				/* i.MX28 SoC */
 #define MACH_TYPE_M28EVK	3613
-
 #define CONFIG_MACH_TYPE	MACH_TYPE_M28EVK
 
-#include <asm/arch/regs-base.h>
-
+/* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_MISC_INIT
-
-/*
- * SPL
- */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
-/*
- * U-Boot Commands
- */
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
@@ -69,86 +43,18 @@
 
 #define CONFIG_REGEX			/* Enable regular expression support */
 
-/*
- * Memory configurations
- */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-/* Point initial SP in SRAM so SPL can use it too. */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE		0x40000100
-
-/*
- * U-Boot general configurations
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT	"=> "
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc */
-#define CONFIG_SYS_HUSH_PARSER
-
-/*
- * Serial Driver
- */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
-
-/*
- * MMC Driver
- */
-#ifdef	CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MXS_MMC
-#endif
 
-/*
- * APBH DMA
- */
-#define CONFIG_APBH_DMA
-
-/*
- * NAND
- */
+/* Environment */
 #define CONFIG_ENV_SIZE			(16 * 1024)
-#ifdef	CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x60000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_ENV_IS_IN_NAND
 
 /* Environment is in NAND */
-#define CONFIG_ENV_IS_IN_NAND
+#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
 #define CONFIG_ENV_RANGE		(512 * 1024)
@@ -177,40 +83,22 @@
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
-/*
- * Ethernet on SOC (FEC)
- */
-#ifdef	CONFIG_CMD_NET
-#define CONFIG_ETHPRIME			"FEC0"
+/* FEC Ethernet on SoC */
+#ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
-#define CONFIG_MII
-#define CONFIG_FEC_XCV_TYPE		RMII
 #endif
 
-/*
- * I2C
- */
-#ifdef	CONFIG_CMD_I2C
-#define CONFIG_I2C_MXS
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED		400000
-#endif
-
-/*
- * EEPROM
- */
-#ifdef	CONFIG_CMD_EEPROM
+/* EEPROM */
+#ifdef CONFIG_CMD_EEPROM
 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
 #endif
 
-/*
- * RTC
- */
-#ifdef	CONFIG_CMD_DATE
+/* RTC */
+#ifdef CONFIG_CMD_DATE
 /* Use the internal RTC in the MXS chip */
 #define CONFIG_RTC_INTERNAL
-#ifdef	CONFIG_RTC_INTERNAL
+#ifdef CONFIG_RTC_INTERNAL
 #define CONFIG_RTC_MXS
 #else
 #define CONFIG_RTC_M41T62
@@ -219,32 +107,22 @@
 #endif
 #endif
 
-/*
- * USB
- */
-#ifdef	CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MXS
+/* USB */
+#ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_EHCI_MXS_PORT1
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
-#define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #endif
 
-/*
- * SPI
- */
-#ifdef	CONFIG_CMD_SPI
-#define CONFIG_HARD_SPI
-#define CONFIG_MXS_SPI
-#define CONFIG_SPI_HALF_DUPLEX
+/* SPI */
+#ifdef CONFIG_CMD_SPI
 #define CONFIG_DEFAULT_SPI_BUS		2
 #define CONFIG_DEFAULT_SPI_CS		0
 #define CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
 
 /* SPI FLASH */
-#ifdef	CONFIG_CMD_SF
+#ifdef CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SF_DEFAULT_BUS		2
@@ -257,18 +135,12 @@
 #define CONFIG_ENV_SPI_MAX_HZ		40000000
 #define CONFIG_ENV_SPI_MODE		SPI_MODE_0
 #endif
+
 #endif
 
-/*
- * LCD
- */
-#ifdef	CONFIG_VIDEO
-#define	CONFIG_CFB_CONSOLE
-#define	CONFIG_VIDEO_MXS
+/* LCD */
+#ifdef CONFIG_VIDEO
 #define	CONFIG_VIDEO_LOGO
-#define	CONFIG_VIDEO_SW_CURSOR
-#define	CONFIG_VGA_AS_SINGLE_DEVICE
-#define	CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define	CONFIG_SPLASH_SCREEN
 #define	CONFIG_CMD_BMP
 #define	CONFIG_BMP_16BPP
@@ -277,22 +149,15 @@
 #define	CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(512 << 10)
 #endif
 
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
+/* Booting Linux */
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_BOOTARGS		"console=ttyAMA0,115200n8 "
 #define CONFIG_BOOTCOMMAND	"run bootcmd_net"
 #define CONFIG_LOADADDR		0x42000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
-#define CONFIG_OF_LIBFDT
 
-/*
- * Extra Environments
- */
+/* Extra Environment */
 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	"update_nand_full_filename=u-boot.nand\0"			\
 	"update_nand_firmware_filename=u-boot.sb\0"			\
@@ -333,4 +198,7 @@
 		"fi ; "							\
 		"fi\0"
 
-#endif /* __M28EVK_CONFIG_H__ */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_M28EVK_H__ */
diff --git a/include/configs/mcx.h b/include/configs/mcx.h
index c2b16316f11..85ae016e0ca 100644
--- a/include/configs/mcx.h
+++ b/include/configs/mcx.h
@@ -16,6 +16,7 @@
 #define CONFIG_OMAP34XX			/* which is a 34XX */
 #define CONFIG_OMAP3_MCX		/* working with mcx */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define MACH_TYPE_MCX			3656
 #define CONFIG_MACH_TYPE	MACH_TYPE_MCX
diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h
index 94bedd6d253..575fe2a22dd 100644
--- a/include/configs/mx23_olinuxino.h
+++ b/include/configs/mx23_olinuxino.h
@@ -3,40 +3,15 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+ 
  */
-#ifndef __MX23_OLINUXINO_CONFIG_H__
-#define __MX23_OLINUXINO_CONFIG_H__
+#ifndef __CONFIGS_MX23_OLINUXINO_H__
+#define __CONFIGS_MX23_OLINUXINO_H__
 
-#include <asm/arch/iomux-mx23.h>
-
-/*
- * SoC configurations
- */
+/* System configurations */
 #define CONFIG_MX23				/* i.MX23 SoC */
-#define CONFIG_MXS_GPIO				/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
-
 #define CONFIG_MACH_TYPE	4105
 
-#include <asm/arch/regs-base.h>
-
+/* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_MISC_INIT
-
-/*
- * SPL
- */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
-/*
- * U-Boot Commands
- */
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
@@ -51,92 +26,36 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_USB
 
-/*
- * Memory configurations
- */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-/* Point initial SP in SRAM so SPL can use it too. */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE		0x40000100
 
-/*
- * U-Boot general configurations
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT	"=> "
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc */
-#define CONFIG_SYS_HUSH_PARSER
+/* Environment */
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_OVERWRITE
 
-/*
- * Serial Driver
- */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_ENV_OFFSET	(256 * 1024)
+#define CONFIG_ENV_SIZE		(16 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV	0
+#endif
 
-/*
- * Status LED
- */
+/* Status LED */
 #define CONFIG_STATUS_LED
 #define CONFIG_GPIO_LED
 #define CONFIG_BOARD_SPECIFIC_LED
-#define STATUS_LED_BOOT	0
-#define STATUS_LED_BIT	MX23_PAD_SSP1_DETECT__GPIO_2_1
+#define STATUS_LED_BOOT		0
+#define STATUS_LED_BIT		MX23_PAD_SSP1_DETECT__GPIO_2_1
 #define STATUS_LED_STATE	STATUS_LED_ON
 #define STATUS_LED_PERIOD	(CONFIG_SYS_HZ / 2)
 
-/*
- * MMC Driver
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MXS_MMC
-#endif
-
-/*
- * APBH DMA
- */
-#define CONFIG_APBH_DMA
-
 /* USB */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #endif
 
@@ -146,31 +65,13 @@
 #define CONFIG_USB_ETHER_SMSC95XX
 #endif
 
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
+/* Booting Linux */
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_LOADADDR		0x42000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
-#define CONFIG_OF_LIBFDT
 
-/*
- * Environment
- */
-#define CONFIG_ENV_IS_IN_MMC
-#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_ENV_IS_IN_MMC
-#define CONFIG_ENV_OFFSET	(256 * 1024)
-#define CONFIG_ENV_SIZE	(16 * 1024)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
-/*
- * Extra Environments
- */
+/* Extra Environment */
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"update_sd_firmware_filename=u-boot.sd\0" \
 	"update_sd_firmware="		/* Update the SD firmware partition */ \
@@ -252,4 +153,7 @@
 		"fi; " \
 	"else run netboot; fi"
 
-#endif /* __MX23_OLINUXINO_CONFIG_H__ */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_MX23_OLINUXINO_H__ */
diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h
index 2380649e066..1b40a36fcf5 100644
--- a/include/configs/mx23evk.h
+++ b/include/configs/mx23evk.h
@@ -6,33 +6,15 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#ifndef __MX23EVK_CONFIG_H__
-#define __MX23EVK_CONFIG_H__
+#ifndef __CONFIGS_MX23EVK_H__
+#define __CONFIGS_MX23EVK_H__
 
-/* SoC configurations */
+/* System configurations */
 #define CONFIG_MX23				/* i.MX23 SoC */
-
-#include <asm/arch/regs-base.h>
-
-#define CONFIG_MXS_GPIO			/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
-
 #define CONFIG_MACH_TYPE	MACH_TYPE_MX23EVK
 
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_MISC_INIT
-
-/* SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
 /* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
 #include <config_cmd_default.h>
 #undef CONFIG_CMD_NET
 #undef CONFIG_CMD_NFS
@@ -49,86 +31,33 @@
 #define CONFIG_CMD_BOOTZ
 #define CONFIG_VIDEO
 
-/* Memory configurations */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x08000000	/* Max 128 MB RAM */
-#define CONFIG_STACKSIZE		(128 * 1024)	/* 128 KB stack */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-/* Point initial SP in SRAM so SPL can use it too. */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE	0x40000100
 
+/* Environment */
 #define CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_IS_IN_MMC
 
-/* U-Boot general configurations */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT	"=> "
-#define CONFIG_SYS_CBSIZE	256		/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE	/* U-BOOT version */
-#define CONFIG_AUTO_COMPLETE		/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING		/* Command history etc */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-
-/* Serial Driver */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
-
-/* DMA */
-#define CONFIG_APBH_DMA
-
-/* MMC Driver */
-#ifdef	CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_MXS_MMC
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_ENV_OFFSET	(256 * 1024)
+#define CONFIG_ENV_SIZE		(16 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV	0
 #endif
 
 /* USB */
 #ifdef	CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #endif
 
 /* Framebuffer support */
 #ifdef CONFIG_VIDEO
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VIDEO_MXS
 #define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_SW_CURSOR
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
@@ -138,21 +67,10 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTDELAY	1
-#define CONFIG_BOOTFILE	"uImage"
-#define CONFIG_LOADADDR	0x42000000
+#define CONFIG_BOOTFILE		"uImage"
+#define CONFIG_LOADADDR		0x42000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
-#define CONFIG_OF_LIBFDT
-
-/* Environment */
-#define CONFIG_ENV_IS_IN_MMC
-#ifdef CONFIG_ENV_IS_IN_MMC
- #define CONFIG_ENV_OFFSET	(256 * 1024)
- #define CONFIG_ENV_SIZE	(16 * 1024)
- #define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
 
 /* Extra Environments */
 #define CONFIG_EXTRA_ENV_SETTINGS \
@@ -211,4 +129,7 @@
 		"fi; " \
 	"else exit; fi"
 
-#endif /* __MX23EVK_CONFIG_H__ */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_MX23EVK_H__ */
diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 885e513f9d9..07f88ca4c7d 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -8,33 +8,16 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
-#ifndef __MX28EVK_CONFIG_H__
-#define __MX28EVK_CONFIG_H__
+#ifndef __CONFIGS_MX28EVK_H__
+#define __CONFIGS_MX28EVK_H__
 
-/* SoC configurations */
+/* System configurations */
 #define CONFIG_MX28				/* i.MX28 SoC */
-
-#define CONFIG_MXS_GPIO			/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
-
 #define CONFIG_MACH_TYPE	MACH_TYPE_MX28EVK
-
-#include <asm/arch/regs-base.h>
-
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_MISC_INIT
-
-/* SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SYS_PROMPT	"MX28EVK U-Boot > "
 
 /* U-Boot Commands */
+#define CONFIG_SYS_NO_FLASH
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
@@ -49,6 +32,7 @@
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_NFS
 #define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVEENV
 #define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
@@ -58,81 +42,24 @@
 #define CONFIG_CMD_NAND_TRIMFFS
 #define CONFIG_VIDEO
 
-/* Memory configurations */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-/* Point initial SP in SRAM so SPL can use it too. */
-
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE	0x40000100
 
+/* Environment */
+#define CONFIG_ENV_SIZE			(16 * 1024)
 #define CONFIG_ENV_OVERWRITE
-/* U-Boot general configurations */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT	"MX28EVK U-Boot > "
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE	/* U-BOOT version */
-#define CONFIG_AUTO_COMPLETE		/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING		/* Command history etc */
-#define CONFIG_SYS_HUSH_PARSER
-
-/* Serial Driver */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
 
-/* DMA */
-#define CONFIG_APBH_DMA
-
-/* MMC Driver */
-#ifdef CONFIG_ENV_IS_IN_MMC
- #define CONFIG_ENV_OFFSET	(256 * 1024)
- #define CONFIG_ENV_SIZE	(16 * 1024)
- #define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-#define CONFIG_CMD_SAVEENV
-#ifdef	CONFIG_CMD_MMC
-#define CONFIG_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_MXS_MMC
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_ENV_OFFSET		(256 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV		0
 #endif
 
-/* NAND Driver */
-#define CONFIG_ENV_SIZE			(16 * 1024)
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MXS
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x60000000
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-
 /* Environment is in NAND */
-#ifdef CONFIG_ENV_IS_IN_NAND
+#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_IN_NAND)
 #define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
 #define CONFIG_ENV_RANGE		(512 * 1024)
@@ -141,6 +68,21 @@
 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
 #endif
 
+/* Environemnt is in SPI flash */
+#if defined(CONFIG_CMD_SF) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_ENV_SIZE			0x1000		/* 4KB */
+#define CONFIG_ENV_OFFSET		0x40000		/* 256K */
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SECT_SIZE		0x1000
+#define CONFIG_ENV_SPI_CS		0
+#define CONFIG_ENV_SPI_BUS		2
+#define CONFIG_ENV_SPI_MAX_HZ		24000000
+#define CONFIG_ENV_SPI_MODE		SPI_MODE_0
+#endif
+
+/* UBI and NAND partitioning */
+#ifdef CONFIG_CMD_NAND
 #define CONFIG_CMD_UBI
 #define CONFIG_CMD_UBIFS
 #define CONFIG_CMD_MTDPARTS
@@ -160,13 +102,10 @@
 		"-(filesystem)"
 #endif
 
-/* Ethernet on SOC (FEC) */
+/* FEC Ethernet on SoC */
 #ifdef	CONFIG_CMD_NET
-#define CONFIG_NET_MULTI
-#define CONFIG_ETHPRIME	"FEC0"
 #define CONFIG_FEC_MXC
-#define CONFIG_MII
-#define CONFIG_FEC_XCV_TYPE	RMII
+#define CONFIG_NET_MULTI
 #define CONFIG_MX28_FEC_MAC_IN_OCOTP
 #endif
 
@@ -177,65 +116,35 @@
 
 /* USB */
 #ifdef	CONFIG_CMD_USB
-#define	CONFIG_USB_EHCI
-#define	CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_MXS_PORT1
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
-#define	CONFIG_EHCI_IS_TDI
 #define	CONFIG_USB_STORAGE
 #define	CONFIG_USB_HOST_ETHER
 #define	CONFIG_USB_ETHER_ASIX
 #define	CONFIG_USB_ETHER_SMSC95XX
 #endif
 
-/* I2C */
-#ifdef CONFIG_CMD_I2C
-#define CONFIG_I2C_MXS
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED	400000
-#endif
-
 /* SPI */
 #ifdef CONFIG_CMD_SPI
-#define CONFIG_HARD_SPI
-#define CONFIG_MXS_SPI
-#define CONFIG_SPI_HALF_DUPLEX
 #define CONFIG_DEFAULT_SPI_BUS		2
 #define CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
 
 /* SPI Flash */
 #ifdef CONFIG_CMD_SF
 #define CONFIG_SPI_FLASH
-#define CONFIG_SF_DEFAULT_BUS	2
-#define CONFIG_SF_DEFAULT_CS	0
+#define CONFIG_SF_DEFAULT_BUS		2
+#define CONFIG_SF_DEFAULT_CS		0
 /* this may vary and depends on the installed chip */
 #define CONFIG_SPI_FLASH_SST
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #define CONFIG_SF_DEFAULT_SPEED		24000000
-
-/* (redundant) environemnt in SPI flash */
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SIZE			0x1000		/* 4KB */
-#define CONFIG_ENV_OFFSET		0x40000		/* 256K */
-#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
-#define CONFIG_ENV_SECT_SIZE		0x1000
-#define CONFIG_ENV_SPI_CS		0
-#define CONFIG_ENV_SPI_BUS		2
-#define CONFIG_ENV_SPI_MAX_HZ		24000000
-#define CONFIG_ENV_SPI_MODE		SPI_MODE_0
-#endif
 #endif
+
 #endif
 
 /* Framebuffer support */
 #ifdef CONFIG_VIDEO
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VIDEO_MXS
 #define CONFIG_VIDEO_LOGO
-#define CONFIG_VIDEO_SW_CURSOR
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define CONFIG_SPLASH_SCREEN
 #define CONFIG_CMD_BMP
 #define CONFIG_BMP_16BPP
@@ -245,15 +154,12 @@
 #endif
 
 /* Boot Linux */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_BOOTDELAY	1
-#define CONFIG_BOOTFILE	"uImage"
-#define CONFIG_LOADADDR	0x42000000
+#define CONFIG_BOOTFILE		"uImage"
+#define CONFIG_LOADADDR		0x42000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
-#define CONFIG_OF_LIBFDT
 
-/* Extra Environments */
+/* Extra Environment */
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"update_nand_full_filename=u-boot.nand\0" \
 	"update_nand_firmware_filename=u-boot.sb\0"	\
@@ -364,4 +270,7 @@
 		"fi; " \
 	"else run netboot; fi"
 
-#endif /* __MX28EVK_CONFIG_H__ */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_MX28EVK_H__ */
diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h
deleted file mode 100644
index 511db736053..00000000000
--- a/include/configs/mx6qsabrelite.h
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
- *
- * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CONFIG_MX6
-#define CONFIG_MX6Q
-
-#include "mx6_common.h"
-
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-#define CONFIG_MACH_TYPE	3769
-
-#include <asm/arch/imx-regs.h>
-#include <asm/imx-common/gpio.h>
-
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
-#define CONFIG_REVISION_TAG
-
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
-
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_MISC_INIT_R
-#define CONFIG_MXC_GPIO
-
-#define CONFIG_CMD_FUSE
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
-#define CONFIG_MXC_UART
-#define CONFIG_MXC_UART_BASE	       UART2_BASE
-
-#define CONFIG_CMD_SF
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_SST
-#define CONFIG_MXC_SPI
-#define CONFIG_SF_DEFAULT_BUS  0
-#define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(3, 19)<<8))
-#define CONFIG_SF_DEFAULT_SPEED 25000000
-#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
-#endif
-
-/* I2C Configs */
-#define CONFIG_CMD_I2C
-#define CONFIG_I2C_MULTI_BUS
-#define CONFIG_I2C_MXC
-#define CONFIG_SYS_I2C_SPEED		100000
-
-/* MMC Configs */
-#define CONFIG_FSL_ESDHC
-#define CONFIG_FSL_USDHC
-#define CONFIG_SYS_FSL_ESDHC_ADDR      0
-#define CONFIG_SYS_FSL_USDHC_NUM       2
-
-#define CONFIG_MMC
-#define CONFIG_CMD_MMC
-#define CONFIG_GENERIC_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
-
-#define CONFIG_CMD_SATA
-/*
- * SATA Configs
- */
-#ifdef CONFIG_CMD_SATA
-#define CONFIG_DWC_AHSATA
-#define CONFIG_SYS_SATA_MAX_DEVICE	1
-#define CONFIG_DWC_AHSATA_PORT_ID	0
-#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
-#define CONFIG_LBA48
-#define CONFIG_LIBATA
-#endif
-
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_NET
-#define CONFIG_FEC_MXC
-#define CONFIG_MII
-#define IMX_FEC_BASE			ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE		RGMII
-#define CONFIG_ETHPRIME			"FEC"
-#define CONFIG_FEC_MXC_PHYADDR		6
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ9021
-
-/* USB Configs */
-#define CONFIG_CMD_USB
-#define CONFIG_CMD_FAT
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MX6
-#define CONFIG_USB_STORAGE
-#define CONFIG_USB_HOST_ETHER
-#define CONFIG_USB_ETHER_ASIX
-#define CONFIG_USB_ETHER_SMSC95XX
-#define CONFIG_MXC_USB_PORT	1
-#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
-#define CONFIG_MXC_USB_FLAGS	0
-
-/* Miscellaneous commands */
-#define CONFIG_CMD_BMODE
-
-/* Framebuffer and LCD */
-#define CONFIG_VIDEO
-#define CONFIG_VIDEO_IPUV3
-#define CONFIG_CFB_CONSOLE
-#define CONFIG_VGA_AS_SINGLE_DEVICE
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
-#define CONFIG_VIDEO_BMP_RLE8
-#define CONFIG_SPLASH_SCREEN
-#define CONFIG_BMP_16BPP
-#define CONFIG_VIDEO_LOGO
-#define CONFIG_IPUV3_CLK 260000000
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_CONS_INDEX	       1
-#define CONFIG_BAUDRATE			       115200
-
-/* Command definition */
-#include <config_cmd_default.h>
-
-#undef CONFIG_CMD_IMLS
-
-#define CONFIG_BOOTDELAY	       1
-
-#define CONFIG_PREBOOT                 ""
-
-#define CONFIG_LOADADDR			       0x12000000
-#define CONFIG_SYS_TEXT_BASE	       0x17800000
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"script=boot.scr\0" \
-	"uimage=uImage\0" \
-	"console=ttymxc1\0" \
-	"fdt_high=0xffffffff\0" \
-	"initrd_high=0xffffffff\0" \
-	"fdt_file=imx6q-sabrelite.dtb\0" \
-	"fdt_addr=0x11000000\0" \
-	"boot_fdt=try\0" \
-	"ip_dyn=yes\0" \
-	"mmcdev=0\0" \
-	"mmcpart=1\0" \
-	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
-	"mmcargs=setenv bootargs console=${console},${baudrate} " \
-		"root=${mmcroot}\0" \
-	"loadbootscript=" \
-		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
-	"bootscript=echo Running bootscript from mmc ...; " \
-		"source\0" \
-	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
-	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
-	"mmcboot=echo Booting from mmc ...; " \
-		"run mmcargs; " \
-		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
-			"if run loadfdt; then " \
-				"bootm ${loadaddr} - ${fdt_addr}; " \
-			"else " \
-				"if test ${boot_fdt} = try; then " \
-					"bootm; " \
-				"else " \
-					"echo WARN: Cannot load the DT; " \
-				"fi; " \
-			"fi; " \
-		"else " \
-			"bootm; " \
-		"fi;\0" \
-	"netargs=setenv bootargs console=${console},${baudrate} " \
-		"root=/dev/nfs " \
-	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
-		"netboot=echo Booting from net ...; " \
-		"run netargs; " \
-		"if test ${ip_dyn} = yes; then " \
-			"setenv get_cmd dhcp; " \
-		"else " \
-			"setenv get_cmd tftp; " \
-		"fi; " \
-		"${get_cmd} ${uimage}; " \
-		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
-			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
-				"bootm ${loadaddr} - ${fdt_addr}; " \
-			"else " \
-				"if test ${boot_fdt} = try; then " \
-					"bootm; " \
-				"else " \
-					"echo WARN: Cannot load the DT; " \
-				"fi; " \
-			"fi; " \
-		"else " \
-			"bootm; " \
-		"fi;\0"
-
-#define CONFIG_BOOTCOMMAND \
-	   "mmc dev ${mmcdev}; if mmc rescan; then " \
-		   "if run loadbootscript; then " \
-			   "run bootscript; " \
-		   "else " \
-			   "if run loaduimage; then " \
-				   "run mmcboot; " \
-			   "else run netboot; " \
-			   "fi; " \
-		   "fi; " \
-	   "else run netboot; fi"
-
-/* Miscellaneous configurable options */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT	       "MX6QSABRELITE U-Boot > "
-#define CONFIG_AUTO_COMPLETE
-#define CONFIG_SYS_CBSIZE	       256
-
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS	       16
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END	       0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
-#define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
-#define CONFIG_SYS_HZ		       1000
-
-#define CONFIG_CMDLINE_EDITING
-
-/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS	       1
-#define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
-#define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)
-
-#define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
-#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
-#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-
-/* FLASH and environment organization */
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_ENV_SIZE			(8 * 1024)
-
-#define CONFIG_ENV_IS_IN_MMC
-/* #define CONFIG_ENV_IS_IN_SPI_FLASH */
-
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
-#define CONFIG_SYS_MMC_ENV_DEV		0
-#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
-#define CONFIG_ENV_OFFSET		(768 * 1024)
-#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
-#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
-#endif
-
-#define CONFIG_OF_LIBFDT
-#define CONFIG_CMD_BOOTZ
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-#define CONFIG_CMD_CACHE
-#endif
-
-#endif			       /* __CONFIG_H */
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index dad8618c0ad..bf6113b2aa1 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -12,6 +12,7 @@
 #define CONFIG_MX6
 
 #include "mx6_common.h"
+#include <asm/sizes.h>
 
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
@@ -24,7 +25,7 @@
 #define CONFIG_REVISION_TAG
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
 
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_LATE_INIT
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 57e1860b1b1..a3dd74a4a25 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -9,6 +9,9 @@
 #ifndef __MX6QSABRESD_CONFIG_H
 #define __MX6QSABRESD_CONFIG_H
 
+#include <asm/arch/imx-regs.h>
+#include <asm/imx-common/gpio.h>
+
 #define CONFIG_MACH_TYPE	3980
 #define CONFIG_MXC_UART_BASE	UART1_BASE
 #define CONFIG_CONSOLE_DEV		"ttymxc0"
@@ -23,4 +26,20 @@
 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SDHC3 */
 #endif
 
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
+
 #endif                         /* __MX6QSABRESD_CONFIG_H */
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
new file mode 100644
index 00000000000..a684166502f
--- /dev/null
+++ b/include/configs/mxs.h
@@ -0,0 +1,191 @@
+/*
+ * Copyright (C) 2013 Marek Vasut <marex@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef __CONFIGS_MXS_H__
+#define __CONFIGS_MXS_H__
+
+/*
+ * Includes
+ */
+
+#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
+#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
+#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
+#error Select one of CONFIG_MX23 or CONFIG_MX28 !
+#endif
+
+#include <asm/arch/regs-base.h>
+
+#if defined(CONFIG_MX23)
+#include <asm/arch/iomux-mx23.h>
+#elif defined(CONFIG_MX28)
+#include <asm/arch/iomux-mx28.h>
+#endif
+
+/*
+ * CPU specifics
+ */
+
+/* Ticks per second */
+#define CONFIG_SYS_HZ		1000
+
+/* MXS uses FDT */
+#define CONFIG_OF_LIBFDT
+
+/* Startup hooks */
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_ARCH_MISC_INIT
+
+/* SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
+#define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
+#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+
+/* Memory sizes */
+#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
+#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
+#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
+#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
+
+/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
+#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
+#if defined(CONFIG_MX23)
+#define CONFIG_SYS_INIT_RAM_SIZE	(32 * 1024)
+#elif defined(CONFIG_MX28)
+#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
+#endif
+
+/* Point initial SP in SRAM so SPL can use it too. */
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/*
+ * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
+ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
+ * binary. In case there was more of this mess, 0x100 bytes are skipped.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x40000100
+
+/* U-Boot general configuration */
+#define CONFIG_SYS_LONGHELP
+#ifndef CONFIG_SYS_PROMPT
+#define CONFIG_SYS_PROMPT	"=> "
+#endif
+#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
+#define CONFIG_SYS_PBSIZE	\
+	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+						/* Print buffer size */
+#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
+						/* Boot argument buffer size */
+#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
+#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
+#define CONFIG_CMDLINE_EDITING			/* Command history etc */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+
+/* Booting Linux */
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+
+/*
+ * Drivers
+ */
+
+/* APBH DMA */
+#define CONFIG_APBH_DMA
+
+/* GPIO */
+#define CONFIG_MXS_GPIO
+
+/* DUART Serial Driver */
+#define CONFIG_PL011_SERIAL
+#define CONFIG_PL011_CLOCK		24000000
+#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define CONFIG_CONS_INDEX		0
+/* Default baudrate can be overriden by board! */
+#ifndef CONFIG_BAUDRATE
+#define CONFIG_BAUDRATE			115200
+#endif
+
+/* FEC Ethernet on SoC */
+#ifdef CONFIG_FEC_MXC
+#define CONFIG_MII
+#ifndef CONFIG_ETHPRIME
+#define CONFIG_ETHPRIME			"FEC0"
+#endif
+#ifndef CONFIG_FEC_XCV_TYPE
+#define CONFIG_FEC_XCV_TYPE		RMII
+#endif
+#endif
+
+/* I2C */
+#ifdef CONFIG_CMD_I2C
+#define CONFIG_I2C_MXS
+#define CONFIG_HARD_I2C
+#ifndef CONFIG_SYS_I2C_SPEED
+#define CONFIG_SYS_I2C_SPEED		400000
+#endif
+#endif
+
+/* LCD */
+#ifdef CONFIG_VIDEO
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#endif
+
+/* MMC */
+#ifdef CONFIG_CMD_MMC
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_MXS_MMC
+#endif
+
+/* NAND */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_MXS
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		0x60000000
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#endif
+
+/* SPI */
+#ifdef CONFIG_CMD_SPI
+#define CONFIG_HARD_SPI
+#define CONFIG_MXS_SPI
+#define CONFIG_SPI_HALF_DUPLEX
+#endif
+
+/* USB */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MXS
+#define CONFIG_EHCI_IS_TDI
+#endif
+
+#endif	/* __CONFIGS_MXS_H__ */
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 4242414266c..3454b862a8d 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -141,6 +141,7 @@
 #define CONFIG_IPUV3_CLK 260000000
 #define CONFIG_CMD_HDMIDETECT
 #define CONFIG_CONSOLE_MUX
+#define CONFIG_IMX_HDMI
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
@@ -173,6 +174,80 @@
 
 #define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
 
+#if defined(CONFIG_SABRELITE)
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"script=boot.scr\0" \
+	"uimage=uImage\0" \
+	"console=ttymxc1\0" \
+	"fdt_high=0xffffffff\0" \
+	"initrd_high=0xffffffff\0" \
+	"fdt_file=imx6q-sabrelite.dtb\0" \
+	"fdt_addr=0x11000000\0" \
+	"boot_fdt=try\0" \
+	"ip_dyn=yes\0" \
+	"mmcdev=0\0" \
+	"mmcpart=1\0" \
+	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
+	"mmcargs=setenv bootargs console=${console},${baudrate} " \
+		"root=${mmcroot}\0" \
+	"loadbootscript=" \
+		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source\0" \
+	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run mmcargs; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if run loadfdt; then " \
+				"bootm ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"if test ${boot_fdt} = try; then " \
+					"bootm; " \
+				"else " \
+					"echo WARN: Cannot load the DT; " \
+				"fi; " \
+			"fi; " \
+		"else " \
+			"bootm; " \
+		"fi;\0" \
+	"netargs=setenv bootargs console=${console},${baudrate} " \
+		"root=/dev/nfs " \
+	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+		"netboot=echo Booting from net ...; " \
+		"run netargs; " \
+		"if test ${ip_dyn} = yes; then " \
+			"setenv get_cmd dhcp; " \
+		"else " \
+			"setenv get_cmd tftp; " \
+		"fi; " \
+		"${get_cmd} ${uimage}; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+				"bootm ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"if test ${boot_fdt} = try; then " \
+					"bootm; " \
+				"else " \
+					"echo WARN: Cannot load the DT; " \
+				"fi; " \
+			"fi; " \
+		"else " \
+			"bootm; " \
+		"fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+	   "mmc dev ${mmcdev}; if mmc rescan; then " \
+		   "if run loadbootscript; then " \
+			   "run bootscript; " \
+		   "else " \
+			   "if run loaduimage; then " \
+				   "run mmcboot; " \
+			   "else run netboot; " \
+			   "fi; " \
+		   "fi; " \
+	   "else run netboot; fi"
+#else
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"console=ttymxc1\0" \
 	"clearenv=if sf probe || sf probe || sf probe 1 ; then " \
@@ -206,6 +281,7 @@
 		"done ; " \
 	"done\0" \
 
+#endif
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_HUSH_PARSER
@@ -245,8 +321,11 @@
 
 #define CONFIG_ENV_SIZE			(8 * 1024)
 
-/* #define CONFIG_ENV_IS_IN_MMC */
+#if defined(CONFIG_SABRELITE)
+#define CONFIG_ENV_IS_IN_MMC
+#else
 #define CONFIG_ENV_IS_IN_SPI_FLASH
+#endif
 
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index 36c6800c566..cfc5f1205e1 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -28,6 +28,7 @@
 #define CONFIG_OMAP3430			/* which is in a 3430 */
 #define CONFIG_OMAP3_RX51		/* working with RX51 */
 #define CONFIG_SYS_L2CACHE_OFF		/* pretend there is no L2 CACHE */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_MACH_TYPE		MACH_TYPE_NOKIA_RX51
 
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 7958ca54459..c1245e7b841 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -19,6 +19,7 @@
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_BEAGLE	1	/* working with BEAGLE */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
@@ -134,7 +135,7 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_EXT2		/* EXT2 Support			*/
 #define CONFIG_CMD_FAT		/* FAT support			*/
-#define CONFIG_CMD_JFFS2	/* JFFS2 Support		*/
+#define CONFIG_CMD_FS_GENERIC	/* Generic FS support */
 #define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
 #define MTDIDS_DEFAULT			"nand0=nand"
@@ -187,13 +188,6 @@
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
 							/* devices */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV		"nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET	0x680000
-#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
-							/* partition */
 
 /* Environment information */
 #define CONFIG_BOOTDELAY		3
@@ -201,8 +195,13 @@
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"loadaddr=0x80200000\0" \
 	"rdaddr=0x81000000\0" \
+	"fdt_high=0xffffffff\0" \
+	"fdtaddr=0x80f80000\0" \
 	"usbtty=cdc_acm\0" \
-	"bootfile=uImage.beagle\0" \
+	"bootfile=uImage\0" \
+	"ramdisk=ramdisk.gz\0" \
+	"bootdir=/boot\0" \
+	"bootpart=0:2\0" \
 	"console=ttyO2,115200n8\0" \
 	"mpurate=auto\0" \
 	"buddy=none\0" \
@@ -238,6 +237,17 @@
 		"omapdss.def_disp=${defaultdisplay} " \
 		"root=${nandroot} " \
 		"rootfstype=${nandrootfstype}\0" \
+	"findfdt=" \
+		"if test $beaglerev = AxBx; then " \
+			"setenv fdtfile omap3-beagle.dtb; fi; " \
+		"if test $beaglerev = Cx; then " \
+			"setenv fdtfile omap3-beagle.dtb; fi; " \
+		"if test $beaglerev = xMAB; then " \
+			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
+		"if test $beaglerev = xMC; then " \
+			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
+		"if test $fdtfile = undefined; then " \
+			"echo WARNING: Could not determine device tree to use; fi; \0" \
 	"bootenv=uEnv.txt\0" \
 	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
 	"importbootenv=echo Importing environment from mmc ...; " \
@@ -251,12 +261,15 @@
 		"omapdss.def_disp=${defaultdisplay} " \
 		"root=${ramroot} " \
 		"rootfstype=${ramrootfstype}\0" \
-	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
-	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
-	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
+	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
+	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
+	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
 	"mmcboot=echo Booting from mmc ...; " \
 		"run mmcargs; " \
 		"bootm ${loadaddr}\0" \
+	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
+		"run mmcargs; " \
+		"bootz ${loadaddr} - ${fdtaddr}\0" \
 	"nandboot=echo Booting from nand ...; " \
 		"run nandargs; " \
 		"nand read ${loadaddr} 280000 400000; " \
@@ -270,6 +283,7 @@
 	"userbutton_nonxm=gpio input 7;\0"
 /* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
 #define CONFIG_BOOTCOMMAND \
+	"run findfdt; " \
 	"mmc dev ${mmcdev}; if mmc rescan; then " \
 		"if run userbutton; then " \
 			"setenv bootenv uEnv.txt;" \
@@ -285,11 +299,16 @@
 			"echo Running uenvcmd ...;" \
 			"run uenvcmd;" \
 		"fi;" \
-		"if run loaduimage; then " \
+		"if run loadimage; then " \
 			"run mmcboot;" \
 		"fi;" \
 	"fi;" \
 	"run nandboot;" \
+	"setenv bootfile zImage;" \
+	"if run loadimage; then " \
+		"run loadfdt;" \
+		"run mmcbootz; " \
+	"fi; " \
 
 #define CONFIG_AUTO_COMPLETE		1
 /*
diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h
index 3b3e25ad842..edf65434430 100644
--- a/include/configs/omap3_evm_common.h
+++ b/include/configs/omap3_evm_common.h
@@ -15,6 +15,7 @@
 #define CONFIG_OMAP			/* This is TI OMAP core */
 #define CONFIG_OMAP34XX			/* belonging to 34XX family */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC			/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 3dd6d329656..ee6db51274c 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -18,6 +18,7 @@
 #define CONFIG_OMAP34XX			/* which is a 34XX */
 #define CONFIG_OMAP3_LOGIC		/* working with Logic OMAP boards */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SYS_TEXT_BASE	0x80400000
 
diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h
index 5526b4314f0..0c88419f245 100644
--- a/include/configs/omap3_mvblx.h
+++ b/include/configs/omap3_mvblx.h
@@ -24,6 +24,7 @@
 #define CONFIG_MVBLX		1	/* working with mvBlueLYNX-X */
 #define CONFIG_MACH_TYPE	MACH_TYPE_MVBLX
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 3e018c00e8b..88380a42c60 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -14,6 +14,7 @@
 #define CONFIG_OMAP34XX				/* which is a 34XX */
 #define CONFIG_OMAP3_OVERO			/* working with overo */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC				/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 3e8bd67d27f..91a25684c7a 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -17,6 +17,7 @@
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_PANDORA	1	/* working with pandora */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index 836a3d847d1..a5e469ce325 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -23,6 +23,7 @@
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_3430SDP	1	/* working with SDP Rev2 */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index 36870459ef5..c747d5247b9 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -19,6 +19,7 @@
 #define CONFIG_OMAP		1	/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_ZOOM1	1	/* working with Zoom MDK Rev1 */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h
index c57df8edb5c..cb8c7ec6f06 100644
--- a/include/configs/omap3_zoom2.h
+++ b/include/configs/omap3_zoom2.h
@@ -21,6 +21,7 @@
 #define CONFIG_OMAP34XX		1	/* which is a 34XX */
 #define CONFIG_OMAP3_ZOOM2	1	/* working with Zoom II */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SDRC	/* The chip has SDRC controller */
 
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index 719cb83d9a9..e9f2383f7c8 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -20,6 +20,7 @@
 #define CONFIG_OMAP44XX		1	/* which is a 44XX */
 #define CONFIG_OMAP4430		1	/* which is in a 4430 */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 /* Get CPU defs */
 #include <asm/arch/cpu.h>
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index 7dd56cfa787..8e82fed2347 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -9,111 +9,59 @@
  * TI OMAP5 AND DRA7XX common configuration settings
  *
  * SPDX-License-Identifier:	GPL-2.0+ 
+ *
+ * For more details, please see the technical documents listed at
+ * http://www.ti.com/product/omap5432
  */
 
 #ifndef __CONFIG_OMAP5_COMMON_H
 #define __CONFIG_OMAP5_COMMON_H
 
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP	/* in a TI OMAP core */
-#define CONFIG_OMAP54XX	/* which is a 54XX */
-#define CONFIG_OMAP_GPIO
-
-/* Get CPU defs */
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap.h>
-
-/* Display CPU and Board Info */
+#define CONFIG_OMAP54XX
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DISPLAY_BOARDINFO
-
 #define CONFIG_MISC_INIT_R
+#define CONFIG_ARCH_CPU_INIT
 
-#define CONFIG_OF_LIBFDT
-#define CONFIG_CMD_BOOTZ
+#define CONFIG_SYS_CACHELINE_SIZE	64
 
-#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_INITRD_TAG
+/* Use General purpose timer 1 */
+#define CONFIG_SYS_TIMERBASE		GPT2_BASE
+
+#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+
+/* Defines for SDRAM init */
+#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+#endif
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_PALMAS_POWER
+#endif
+
+#include <asm/arch/cpu.h>
+#include <asm/arch/omap.h>
 
-/*
- * Size of malloc() pool
- * Total Size Environment - 128k
- * Malloc - add 256k
- */
 #define CONFIG_ENV_SIZE			(128 << 10)
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (256 << 10))
-/* Vector Base */
-#define CONFIG_SYS_CA9_VECTOR_BASE	SRAM_ROM_VECT_BASE
 
-/*
- * Hardware drivers
- */
+#include <configs/ti_armv7_common.h>
 
 /*
- * serial port - NS16550 compatible
+ * Hardware drivers
  */
-#define V_NS16550_CLK			48000000
-
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
-#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
-
-/* CPU */
-#define CONFIG_ARCH_CPU_INIT
-
-/* I2C  */
-#define CONFIG_HARD_I2C
-#define CONFIG_SYS_I2C_SPEED		100000
-#define CONFIG_SYS_I2C_SLAVE		1
-#define CONFIG_DRIVER_OMAP34XX_I2C
-#define CONFIG_I2C_MULTI_BUS
-
-/* MMC */
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC
-#define CONFIG_OMAP_HSMMC
-#define CONFIG_DOS_PARTITION
-
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
-
-/* Flash */
-#define CONFIG_SYS_NO_FLASH
-
-/* Cache */
-#define CONFIG_SYS_CACHELINE_SIZE	64
-#define CONFIG_SYS_CACHELINE_SHIFT	6
-
-/* commands to include */
-#include <config_cmd_default.h>
-
-/* Enabled commands */
-#define CONFIG_CMD_EXT2		/* EXT2 Support                 */
-#define CONFIG_CMD_FAT		/* FAT support                  */
-#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
-#define CONFIG_CMD_MMC		/* MMC support                  */
+#define CONFIG_SYS_NS16550_CLK		48000000
 
-/* Disabled commands */
+/* Per-SoC commands */
 #undef CONFIG_CMD_NET
 #undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_FPGA		/* FPGA configuration Support   */
-#undef CONFIG_CMD_IMLS		/* List all found images        */
 
 /*
  * Environment setup
  */
-
-#define CONFIG_BOOTDELAY	3
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_CMD_FS_GENERIC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-
-#define CONFIG_ENV_OVERWRITE
-
 #ifndef PARTS_DEFAULT
 #define PARTS_DEFAULT
 #endif
@@ -178,96 +126,11 @@
 		"fi; " \
 	"fi"
 
-#define CONFIG_AUTO_COMPLETE		1
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LONGHELP	/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER	/* use "hush" command parser */
-#define CONFIG_SYS_CBSIZE		256
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
-
-/*
- * memtest setup
- */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (32 << 20))
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR		0x80000000
-
-/* Use General purpose timer 1 */
-#define CONFIG_SYS_TIMERBASE		GPT2_BASE
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ			1000
-
-/*
- * SDRAM Memory Map
- * Even though we use two CS all the memory
- * is mapped to one contiguous block
- */
-#define CONFIG_NR_DRAM_BANKS	1
-
-#define CONFIG_SYS_SDRAM_BASE		0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
-					 GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-
-/* Defines for SDRAM init */
-#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
-#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
-#endif
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_PALMAS_POWER
-#endif
 
 /* Defines for SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x40300350
 #define CONFIG_SPL_MAX_SIZE		0x19000	/* 100K */
-#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
 #define CONFIG_SPL_DISPLAY_PRINT
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
 
-/*
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 80E7FFC0--0x80E80000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE		0x80E80000
-
-/*
- * BSS and malloc area 64MB into memory to allow enough
- * space for the kernel at the beginning of memory
- */
-#define CONFIG_SPL_BSS_START_ADDR	0x84000000
-#define CONFIG_SPL_BSS_MAX_SIZE		0x100000	/* 1 MB */
-#define CONFIG_SYS_SPL_MALLOC_START	0x84100000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
-#define CONFIG_SPL_GPIO_SUPPORT
-
 #endif /* __CONFIG_OMAP5_COMMON_H */
diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h
index 9c045d30569..d10c2b56f94 100644
--- a/include/configs/omap5_uevm.h
+++ b/include/configs/omap5_uevm.h
@@ -17,8 +17,6 @@
 	"uuid_disk=${uuid_gpt_disk};" \
 	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
 
-#include <configs/omap5_common.h>
-
 #define CONFIG_CONS_INDEX		3
 #define CONFIG_SYS_NS16550_COM3		UART3_BASE
 #define CONFIG_BAUDRATE			115200
@@ -37,9 +35,14 @@
 #define CONFIG_PARTITION_UUIDS
 #define CONFIG_CMD_PART
 
-#define CONFIG_SYS_PROMPT		"OMAP5432 uEVM # "
+#define CONFIG_TCA642X
+#define CONFIG_CMD_TCA642X
+#define CONFIG_SYS_I2C_TCA642X_BUS_NUM 4
+#define CONFIG_SYS_I2C_TCA642X_ADDR 0x22
 
 #define CONSOLEDEV		"ttyO2"
-
 #define CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC	16296
+
+#include <configs/omap5_common.h>
+
 #endif /* __CONFIG_OMAP5_EVM_H */
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index 9b16c47820f..d4d4d791cf9 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -21,12 +21,10 @@
 
 #define CONFIG_AM33XX
 #define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
 
 #include <asm/arch/omap.h>
 
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
-
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
 #define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
@@ -125,7 +123,7 @@
  * memtest works on 8 MB in DRAM after skipping 32MB from
  * start addr of ram disk
  */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
+#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + (64 << 20))
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
 					+ (8 * 1024 * 1024))
 
@@ -149,10 +147,9 @@
 
  /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS		1		/*  1 bank of DRAM */
-#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 19)	/* 512MiB */
 
-#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
 						GENERATED_GBL_DATA_SIZE)
  /* Platform/Board specific defs */
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index 9c2eb05c046..58ffa36dd9f 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -6,48 +6,16 @@
  *
  * SPDX-License-Identifier:	GPL-2.0+ 
  */
-#ifndef __SC_SPS_1_H__
-#define __SC_SPS_1_H__
+#ifndef __CONFIGS_SC_SPS_1_H__
+#define __CONFIGS_SC_SPS_1_H__
 
-/*
- * SoC configurations
- */
+/* System configuration */
 #define CONFIG_MX28				/* i.MX28 SoC */
-#define CONFIG_MXS_GPIO				/* GPIO control */
-#define CONFIG_SYS_HZ		1000		/* Ticks per second */
-
-/*
- * Define SC_SPS_1 machine type by hand until it lands in mach-types
- */
 #define MACH_TYPE_SC_SPS_1	4172
-
 #define CONFIG_MACH_TYPE	MACH_TYPE_SC_SPS_1
 
-#include <asm/arch/regs-base.h>
-
+/* U-Boot Commands */
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_BOARD_EARLY_INIT_F
-#define CONFIG_ARCH_CPU_INIT
-#define CONFIG_ARCH_MISC_INIT
-
-#define CONFIG_ENV_IS_IN_MMC
-
-#define CONFIG_OF_LIBFDT
-
-/*
- * SPL
- */
-#define CONFIG_SPL
-#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
-#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
-
-/*
- * U-Boot Commands
- */
 #include <config_cmd_default.h>
 #define CONFIG_DISPLAY_CPUINFO
 #define CONFIG_DOS_PARTITION
@@ -65,119 +33,47 @@
 #define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_USB
 
-/*
- * Memory configurations
- */
+/* Memory configuration */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
-#define CONFIG_STACKSIZE		0x00010000	/* 128 KB stack */
-#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 
-/* Point initial SP in SRAM so SPL can use it too. */
-#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
-#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)
-
-#define CONFIG_SYS_INIT_SP_OFFSET \
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR \
-	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/*
- * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
- * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
- * binary. In case there was more of this mess, 0x100 bytes are skipped.
- */
-#define CONFIG_SYS_TEXT_BASE		0x40000100
-
-/*
- * U-Boot general configurations
- */
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT	"=> "
-#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
-#define CONFIG_SYS_PBSIZE	\
-	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
-						/* Print buffer size */
-#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
-#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
-						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
-#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
-#define CONFIG_CMDLINE_EDITING			/* Command history etc */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-
-/*
- * Serial Driver
- */
-#define CONFIG_PL011_SERIAL
-#define CONFIG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
-#define CONFIG_CONS_INDEX		0
-#define CONFIG_BAUDRATE			115200	/* Default baud rate */
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
-
-/*
- * MMC Driver
- */
-#ifdef CONFIG_CMD_MMC
-#define CONFIG_APBH_DMA
-#define CONFIG_MMC
-#define CONFIG_BOUNCE_BUFFER
-#define CONFIG_GENERIC_MMC
-#define CONFIG_MXS_MMC
-#endif
+/* Environment */
 #define CONFIG_ENV_SIZE			(16 * 1024)
-#ifdef CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_IS_IN_MMC
+
+/* Environment is in MMC */
+#if defined(CONFIG_CMD_MMC) && defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_ENV_OFFSET		(256 * 1024)
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #else
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
-/*
- * Ethernet on SOC (FEC)
- */
+/* FEC Ethernet on SoC */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_ETHPRIME			"FEC0"
 #define CONFIG_FEC_MXC
-#define CONFIG_MII
-#define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_SMSC
 #endif
 
-/*
- * USB
- */
+/* USB */
 #ifdef CONFIG_CMD_USB
-#define CONFIG_USB_EHCI
-#define CONFIG_USB_EHCI_MXS
 #define CONFIG_EHCI_MXS_PORT0
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
-#define CONFIG_EHCI_IS_TDI
 #define CONFIG_USB_STORAGE
 #endif
 
-/*
- * Boot Linux
- */
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_SETUP_MEMORY_TAGS
+/* Booting Linux */
 #define CONFIG_BOOTDELAY	3
 #define CONFIG_BOOTFILE		"uImage"
 #define CONFIG_BOOTARGS		"console=ttyAMA0,115200"
-#define CONFIG_BOOTCOMMAND	"bootm "
+#define CONFIG_BOOTCOMMAND	"bootm"
 #define CONFIG_LOADADDR		0x42000000
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
 
-/*
- * Extra Environments
- */
+/* Extra Environment */
 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	"update_sd_firmware_filename=u-boot.sd\0"			\
 	"update_sd_firmware="		/* Update the SD firmware partition */ \
@@ -189,4 +85,7 @@
 		"fi ; "							\
 		"fi\0"
 
-#endif /* __SC_SPS_1_H__ */
+/* The rest of the configuration is shared */
+#include <configs/mxs.h>
+
+#endif /* __CONFIGS_SC_SPS_1_H__ */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index c297827d80c..c215f0b9252 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -16,6 +16,7 @@
 #define CONFIG_OMAP		/* in a TI OMAP core */
 #define CONFIG_OMAP34XX		/* which is a 34XX */
 #define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_SYS_TEXT_BASE 0x80008000
 
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index eac5ad02434..dfc4c756db8 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -20,12 +20,10 @@
 #define CONFIG_TI814X
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
 
 #include <asm/arch/omap.h>
 
-#define CONFIG_DMA_COHERENT
-#define CONFIG_DMA_COHERENT_SIZE	(1 << 20)
-
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
 #define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
@@ -119,7 +117,7 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_DRAM_1
+#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
 					+ PHYS_DRAM_1_SIZE - (8 << 12))
 
@@ -139,11 +137,10 @@
  * Physical Memory Map
  */
 #define CONFIG_NR_DRAM_BANKS		1		/* 1 banks of DRAM */
-#define PHYS_DRAM_1			0x80000000	/* DRAM Bank #1 */
 #define PHYS_DRAM_1_SIZE		0x20000000	/* 512MB */
 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1024MB */
 
-#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
 					 GENERATED_GBL_DATA_SIZE)
 
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
new file mode 100644
index 00000000000..e90490c7508
--- /dev/null
+++ b/include/configs/ti816x_evm.h
@@ -0,0 +1,180 @@
+/*
+ * ti816x_evm.h
+ *
+ * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
+ * Antoine Tenart, <atenart@adeneo-embedded.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_TI816X_EVM_H
+#define __CONFIG_TI816X_EVM_H
+
+#define CONFIG_TI81XX
+#define CONFIG_TI816X
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
+
+#define CONFIG_ARCH_CPU_INIT
+
+#include <asm/arch/omap.h>
+
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (32 * 1024))
+#define CONFIG_SYS_LONGHELP		/* undef save memory */
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT		"u-boot/ti816x# "
+#define CONFIG_MACH_TYPE		MACH_TYPE_TI8168EVM
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG		/* required for ramdisk support */
+
+#include <config_cmd_default.h>		/* u-boot default commands */
+
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_DISPLAY_CPUINFO
+
+#define CONFIG_BOOTDELAY		3 /* set negative for no autoboot */
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+	"loadaddr=0x81000000\0"		\
+
+#define CONFIG_BOOTCOMMAND			\
+	"mmc rescan;"				\
+	"fatload mmc 0 ${loadaddr} uImage;"	\
+	"bootm ${loadaddr}"			\
+
+#define CONFIG_BOOTARGS	"console=ttyO2,115200n8 noinitrd earlyprintk"
+
+/* Clock Defines */
+#define V_OSCK          24000000    /* Clock output from T2 */
+#define V_SCLK          (V_OSCK >> 1)
+
+#define CONFIG_SYS_MAXARGS	32
+#define CONFIG_SYS_CBSIZE	512 /* console I/O buffer size */
+#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
+		+ sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
+#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE /* boot arg buffer size */
+
+#undef  CONFIG_SYS_CLKS_IN_HZ
+#define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
+#define CONFIG_SYS_HZ			1000	   /* 1ms clock */
+
+#define CONFIG_CMD_ASKEN
+#define CONFIG_CMD_ECHO
+#define CONFIG_OMAP_GPIO
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
+#define CONFIG_FS_FAT
+
+/*
+ * Only one of the following two options (DDR3/DDR2) should be enabled
+ * CONFIG_TI816X_EVM_DDR2
+ * CONFIG_TI816X_EVM_DDR3
+ */
+#define CONFIG_TI816X_EVM_DDR3
+
+/*
+ * Supported values: 400, 531, 675 or 796 MHz
+ */
+#define CONFIG_TI816X_DDR_PLL_796
+
+#define CONFIG_TI816X_USE_EMIF0	1
+#define CONFIG_TI816X_USE_EMIF1	1
+
+
+#define CONFIG_NR_DRAM_BANKS	2		/* we have 2 banks of DRAM */
+#define PHYS_DRAM_1		0x80000000	/* DRAM Bank #1 */
+#define PHYS_DRAM_1_SIZE        0x40000000	/* 1 GB */
+#define PHYS_DRAM_2		0xC0000000	/* DRAM Bank #2 */
+#define PHYS_DRAM_2_SIZE	0x40000000	/* 1 GB */
+
+#define CONFIG_MAX_RAM_BANK_SIZE	(2048 << 20)	/* 2048MB */
+#define CONFIG_SYS_SDRAM_BASE		PHYS_DRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR		(NON_SECURE_SRAM_END - \
+		GENERATED_GBL_DATA_SIZE)
+
+/**
+ * Platform/Board specific defs
+ */
+#define CONFIG_SYS_CLK_FREQ     27000000
+#define CONFIG_SYS_TIMERBASE    0x4802E000
+#define CONFIG_SYS_PTV          2   /* Divisor: 2^(PTV+1) => 8 */
+
+#undef CONFIG_NAND_OMAP_GPMC
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK      (48000000)
+#define CONFIG_SYS_NS16550_COM1     0x48024000  /* Base EVM has UART2 */
+
+#define CONFIG_BAUDRATE     115200
+
+/* allow overwriting serial config and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_SERIAL1
+#define CONFIG_SERIAL2
+#define CONFIG_SERIAL3
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+#define CONFIG_ENV_IS_NOWHERE
+
+/* SPL */
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_TEXT_BASE    0x40400000
+#define CONFIG_SPL_MAX_SIZE     ((128 - 18) * 1024)
+#define CONFIG_SPL_STACK        CONFIG_SYS_INIT_SP_ADDR
+
+#define CONFIG_SPL_BSS_START_ADDR   0x80000000
+#define CONFIG_SPL_BSS_MAX_SIZE     0x80000     /* 512 KB */
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_YMODEM_SUPPORT
+#define CONFIG_SYS_SPI_U_BOOT_OFFS  0x20000
+#define CONFIG_SYS_SPI_U_BOOT_SIZE  0x40000
+#define CONFIG_SPL_LDSCRIPT     "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_BOARD_INIT
+
+#define CONFIG_SYS_TEXT_BASE        0x80800000
+#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE  0x100000
+
+/* Since SPL did pll and ddr initialization for us,
+ * we don't need to do it twice.
+ */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* Unsupported features */
+#undef CONFIG_USE_IRQ
+
+#endif
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
new file mode 100644
index 00000000000..fd3ffab015b
--- /dev/null
+++ b/include/configs/ti_am335x_common.h
@@ -0,0 +1,60 @@
+/*
+ * ti_am335x_common.h
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * For more details, please see the technical documents listed at
+ * http://www.ti.com/product/am3359#technicaldocuments
+ */
+
+#ifndef __CONFIG_TI_AM335X_COMMON_H__
+#define __CONFIG_TI_AM335X_COMMON_H__
+
+#define CONFIG_AM33XX
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_SYS_CACHELINE_SIZE       64
+#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 20)	/* 1GB */
+#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
+
+#include <asm/arch/omap.h>
+
+/* NS16550 Configuration */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		48000000
+
+/* Network defines. */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_DRIVER_TI_CPSW
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_NET_RETRY_COUNT         10
+
+/* SPL defines. */
+#define CONFIG_SPL_TEXT_BASE		0x402F0400
+#define CONFIG_SPL_MAX_SIZE		(0x4030C000 - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_YMODEM_SUPPORT
+
+/*
+ * Since SPL did pll and ddr initialization for us,
+ * we don't need to do it twice.
+ */
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
+/* Now bring in the rest of the common code. */
+#include <configs/ti_armv7_common.h>
+
+#endif	/* __CONFIG_TI_AM335X_COMMON_H__ */
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
new file mode 100644
index 00000000000..e0ab6912baf
--- /dev/null
+++ b/include/configs/ti_armv7_common.h
@@ -0,0 +1,250 @@
+/*
+ * ti_armv7_common.h
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * The various ARMv7 SoCs from TI all share a number of IP blocks when
+ * implementing a given feature.  Rather than define these in every
+ * board or even SoC common file, we define a common file to be re-used
+ * in all cases.  While technically true that some of these details are
+ * configurable at the board design, they are common throughout SoC
+ * reference platforms as well as custom designs and become de facto
+ * standards.
+ */
+
+#ifndef __CONFIG_TI_ARMV7_COMMON_H__
+#define __CONFIG_TI_ARMV7_COMMON_H__
+
+/* Common define for many platforms. */
+#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
+
+/*
+ * We typically do not contain NOR flash.  In the cases where we do, we
+ * undefine this later.
+ */
+#define CONFIG_SYS_NO_FLASH
+
+/* Support both device trees and ATAGs. */
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/*
+ * Our DDR memory always starts at 0x80000000 and U-Boot shall have
+ * relocated itself to higher in memory by the time this value is used.
+ */
+#define CONFIG_SYS_LOAD_ADDR		0x80000000
+
+/*
+ * Default to a quick boot delay.
+ */
+#define CONFIG_BOOTDELAY		1
+
+/*
+ * DDR information.  We say (for simplicity) that we have 1 bank,
+ * always, even when we have more.  We always start at 0x80000000,
+ * and we place the initial stack pointer in our SRAM.
+ */
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x80000000
+#define CONFIG_SYS_INIT_SP_ADDR         (NON_SECURE_SRAM_END - \
+						GENERATED_GBL_DATA_SIZE)
+
+/* Timer information. */
+#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ			1000	/* 1ms clock */
+
+/* I2C IP block */
+#define CONFIG_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_I2C_SLAVE		1
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_DRIVER_OMAP24XX_I2C
+
+/* MMC/SD IP block */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_CMD_MMC
+
+/* McSPI IP block */
+#define CONFIG_SPI
+#define CONFIG_OMAP3_SPI
+#define CONFIG_CMD_SPI
+
+/* GPIO block */
+#define CONFIG_OMAP_GPIO
+#define CONFIG_CMD_GPIO
+
+/*
+ * GPMC NAND block.  We support 1 device and the physical address to
+ * access CS0 at is 0x8000000.
+ */
+#ifdef CONFIG_NAND
+#define CONFIG_CMD_NAND
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_SYS_NAND_BASE		0x8000000
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#endif
+
+/*
+ * The following are general good-enough settings for U-Boot.  We set a
+ * large malloc pool as we generally have a lot of DDR, and we opt for
+ * function over binary size in the main portion of U-Boot as this is
+ * generally easily constrained later if needed.  We enable the config
+ * options that give us information in the environment about what board
+ * we are on so we do not need to rely on the command prompt.  We set a
+ * console baudrate of 115200 and use the default baud rate table.
+ */
+#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_PROMPT		"U-Boot# "
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_ENV_VARS_UBOOT_CONFIG
+#define CONFIG_BAUDRATE			115200
+
+/* We set the max number of command args high to avoid HUSH bugs. */
+#define CONFIG_SYS_MAXARGS		64
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		512
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
+					+ sizeof(CONFIG_SYS_PROMPT) + 16)
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+/*
+ * When we have SPI, NOR or NAND flash we expect to be making use of
+ * mtdparts, both for ease of use in U-Boot and for passing information
+ * on to the Linux kernel.
+ */
+#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NOR) || defined(CONFIG_NAND)
+#define CONFIG_MTD_DEVICE		/* Required for mtdparts */
+#define CONFIG_CMD_MTDPARTS
+#endif
+
+/*
+ * For commands to use, we take the default list and add a few other
+ * useful commands.  Note that we must have set CONFIG_SYS_NO_FLASH
+ * prior to this include, in order to skip a few commands.  When we do
+ * have flash, if we expect these commands they must be enabled in that
+ * config.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_BOOTZ
+
+/*
+ * Common filesystems support.  When we have removable storage we
+ * enabled a number of useful commands and support.
+ */
+#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE)
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FS_GENERIC
+#endif
+
+/*
+ * Our platforms make use of SPL to initalize the hardware (primarily
+ * memory) enough for full U-Boot to be loaded.  We also support Falcon
+ * Mode so that the Linux kernel can be booted directly from SPL
+ * instead, if desired.  We make use of the general SPL framework found
+ * under common/spl/.  Given our generally common memory map, we set a
+ * number of related defaults and sizes here.
+ */
+#ifndef CONFIG_NOR_BOOT
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_OS_BOOT
+
+/*
+ * Place the image at the start of the ROM defined image space.
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.  We load U-Boot itself into memory at
+ * 0x80800000 for legacy reasons (to not conflict with older SPLs).  We
+ * have our BSS be placed 1MiB after this, to allow for the default
+ * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
+ * We have the SPL malloc pool at the end of the BSS area.
+ */
+#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SYS_TEXT_BASE		0x80800000
+#define CONFIG_SPL_BSS_START_ADDR	0x80a00000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
+					 CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE	CONFIG_SYS_MALLOC_LEN
+
+/* RAW SD card / eMMC locations. */
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+
+/* FAT sd card locations. */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#ifdef CONFIG_SPL_OS_BOOT
+#define CONFIG_SYS_SPL_ARGS_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x100)
+
+/* FAT */
+#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME		"uImage"
+#define CONFIG_SPL_FAT_LOAD_ARGS_NAME		"args"
+
+/* RAW SD card / eMMC */
+#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
+#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
+
+/* NAND */
+#ifdef CONFIG_NAND
+#define CONFIG_CMD_SPL_NAND_OFS			0x240000 /* end of u-boot */
+#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS		0x280000
+#define CONFIG_CMD_SPL_WRITE_SIZE		0x2000
+#endif
+
+/* spl export command */
+#define CONFIG_CMD_SPL
+#endif
+
+#ifdef CONFIG_MMC
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#endif
+
+/* General parts of the framework. */
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_BOARD_INIT
+
+#ifdef CONFIG_NAND
+#define CONFIG_SPL_NAND_AM33XX_BCH	/* OMAP4 and later ELM support */
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#endif
+#endif /* !CONFIG_NOR_BOOT */
+
+#endif	/* __CONFIG_TI_ARMV7_COMMON_H__ */
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 4e2cb65b0a3..a9b271464a3 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -19,6 +19,7 @@
 /* High Level Configuration Options */
 #define CONFIG_OMAP			/* in a TI OMAP core */
 #define CONFIG_OMAP34XX			/* which is a 34XX */
+#define CONFIG_OMAP_COMMON
 
 #define CONFIG_MACH_TYPE		MACH_TYPE_TRICORDER
 /*
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 9c23b262004..665cfc3cfa1 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -97,6 +97,7 @@
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IPUV3_CLK 260000000
+#define CONFIG_IMX_HDMI
 
 #if defined(CONFIG_MX6DL)
 #define CONFIG_DEFAULT_FDT_FILE		"imx6dl-wandboard.dtb"
@@ -110,6 +111,7 @@
 	"script=boot.scr\0" \
 	"uimage=uImage\0" \
 	"console=ttymxc0\0" \
+	"splashpos=m,m\0" \
 	"fdt_high=0xffffffff\0" \
 	"initrd_high=0xffffffff\0" \
 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
diff --git a/include/cpsw.h b/include/cpsw.h
index 296b0e557f3..743cb96e7e9 100644
--- a/include/cpsw.h
+++ b/include/cpsw.h
@@ -39,6 +39,7 @@ struct cpsw_platform_data {
 	int	ale_entries;	/* ale table size			*/
 	u32	host_port_reg_ofs;	/* cpdma host port registers	*/
 	u32	hw_stats_reg_ofs;	/* cpsw hw stats counters	*/
+	u32	bd_ram_ofs;		/* Buffer Descriptor RAM offset */
 	u32	mac_control;
 	struct cpsw_slave_data	*slave_data;
 	void	(*control)(int enabled);
diff --git a/include/tca642x.h b/include/tca642x.h
new file mode 100644
index 00000000000..bda86c1ed88
--- /dev/null
+++ b/include/tca642x.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2013 Texas Instruments, Inc.
+ * Author: Dan Murphy <dmurphy@ti.com>
+ *
+ * Derived work from the pca953x.c driver
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __TCA642X_H_
+#define __TCA642X_H_
+
+#ifdef CONFIG_CMD_TCA642X
+enum {
+	TCA642X_CMD_INFO,
+	TCA642X_CMD_DEVICE,
+	TCA642X_CMD_OUTPUT,
+	TCA642X_CMD_INPUT,
+	TCA642X_CMD_INVERT,
+};
+#endif
+
+#define TCA642X_OUT_LOW		0
+#define TCA642X_OUT_HIGH	1
+#define TCA642X_POL_NORMAL	0
+#define TCA642X_POL_INVERT	1
+#define TCA642X_DIR_OUT		0
+#define TCA642X_DIR_IN		1
+
+/* Default to an address that hopefully won't corrupt other i2c devices */
+#ifndef CONFIG_SYS_I2C_TCA642X_ADDR
+#define CONFIG_SYS_I2C_TCA642X_ADDR	(~0)
+#endif
+
+/* Default to an address that hopefully won't corrupt other i2c devices */
+#ifndef CONFIG_SYS_I2C_TCA642X_BUS_NUM
+#define CONFIG_SYS_I2C_TCA642X_BUS_NUM	(0)
+#endif
+
+struct tca642x_bank_info {
+	uint8_t input_reg;
+	uint8_t output_reg;
+	uint8_t polarity_reg;
+	uint8_t configuration_reg;
+};
+
+int tca642x_set_val(uchar chip, uint8_t gpio_bank,
+			uint8_t reg_bit, uint8_t data);
+int tca642x_set_pol(uchar chip, uint8_t gpio_bank,
+			uint8_t reg_bit, uint8_t data);
+int tca642x_set_dir(uchar chip, uint8_t gpio_bank,
+			uint8_t reg_bit, uint8_t data);
+int tca642x_get_val(uchar chip, uint8_t gpio_bank);
+int tca642x_set_inital_state(uchar chip, struct tca642x_bank_info init_data[]);
+
+#endif /* __TCA642X_H_ */
author	Tom Rini <trini@ti.com>	2013-08-18 14:14:34 -0400
committer	Tom Rini <trini@ti.com>	2013-08-18 14:14:34 -0400
commit	e20cc2ca15b5b0644f51b6e58d530d70acd2bc00 (patch)
tree	f85a22536682ef54e77b1ba95cf0b71d00644632 /include
parent	f21876174364391757e743cb8673d3fc5fce7ac7 (diff)
parent	9ed887caecb9ecb0c68773a1870d143b9f28d3da (diff)