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| author | Xingyu Wu <xingyu.wu@starfivetech.com> | 2023-07-07 18:50:09 +0800 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2023-07-24 13:21:06 +0800 |
| commit | 6c4b50e6deb719726a04ca154a6361bd866398f5 (patch) | |
| tree | 8ccc2d154642e6b2e3f3a3b76a93e6957f495904 /lib/efi_loader/efi_variable_tee.c | |
| parent | 005f9627d02e8ecab3c58c77889060e72f7fa25d (diff) | |
riscv: dts: jh7110: Add clock source from PLL
Change the PLL clock source from syscrg to sys_syscon child node.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Diffstat (limited to 'lib/efi_loader/efi_variable_tee.c')
0 files changed, 0 insertions, 0 deletions