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authorStefan Roese <sr@denx.de>2012-08-27 15:39:45 +0200
committerStefan Roese <sr@denx.de>2012-09-03 11:29:07 +0200
commit5d1c88332951d2f58e9f7000a0523543b22d9a90 (patch)
tree5e0008c3b45e0a6eae40918b931923a8ed664abf /nand_spl
parenta005f19eff946454985785788c344f10616d571e (diff)
ppc4xx: Canyonlands/Glacier: Squeeze NAND image a bit to fit again
This patch removes some superfluous SDRAM init calls to fit the NAND_SPL image into 4k again. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'nand_spl')
-rw-r--r--nand_spl/board/amcc/canyonlands/ddr2_fixed.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
index f71ecfb9302..10f62cc812f 100644
--- a/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
+++ b/nand_spl/board/amcc/canyonlands/ddr2_fixed.c
@@ -92,14 +92,11 @@ static void ddr_init_common(void)
mtsdram(SDRAM_INITPLR11, 0x80000432);
mtsdram(SDRAM_INITPLR12, 0x808103C0);
mtsdram(SDRAM_INITPLR13, 0x80810040);
- mtsdram(SDRAM_INITPLR14, 0x00000000);
- mtsdram(SDRAM_INITPLR15, 0x00000000);
mtsdram(SDRAM_RDCC, 0x40000000);
mtsdram(SDRAM_RQDC, 0x80000038);
mtsdram(SDRAM_RFDC, 0x00000257);
mtdcr(SDRAM_R0BAS, 0x0000F800); /* MQ0_B0BAS */
- mtdcr(SDRAM_R1BAS, 0x0400F800); /* MQ0_B1BAS */
}
phys_size_t initdram(int board_type)