diff options
| author | Simon Glass <sjg@chromium.org> | 2019-02-16 20:24:50 -0700 |
|---|---|---|
| committer | Bin Meng <bmeng.cn@gmail.com> | 2019-02-20 15:26:36 +0800 |
| commit | b45c833c71f1ce26e0db6c30f96dc3228051cd15 (patch) | |
| tree | 2e4e0a7357882a7b40ed03607c64ef5975b10882 /test | |
| parent | c882163b09b8a2c52e3dd8acd7d296d6d06d1f2e (diff) | |
sandbox: pch: Add a test for the PCH uclass
This uclass currently has no tests. Add a sandbox driver and some simple
tests to provide basic coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Use "sandbox,pch" for the compatible string, for consistency]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'test')
| -rw-r--r-- | test/dm/Makefile | 1 | ||||
| -rw-r--r-- | test/dm/pch.c | 36 |
2 files changed, 37 insertions, 0 deletions
diff --git a/test/dm/Makefile b/test/dm/Makefile index 1b089960cbb..49857c50929 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -30,6 +30,7 @@ obj-y += ofnode.o obj-$(CONFIG_OSD) += osd.o obj-$(CONFIG_DM_VIDEO) += panel.o obj-$(CONFIG_DM_PCI) += pci.o +obj-$(CONFIG_PCH) += pch.o obj-$(CONFIG_PHY) += phy.o obj-$(CONFIG_POWER_DOMAIN) += power-domain.o obj-$(CONFIG_DM_PWM) += pwm.o diff --git a/test/dm/pch.c b/test/dm/pch.c new file mode 100644 index 00000000000..f184445342b --- /dev/null +++ b/test/dm/pch.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 Google LLC + */ + +#include <common.h> +#include <dm.h> +#include <pch.h> +#include <asm/test.h> +#include <dm/test.h> +#include <test/ut.h> + +/* Test that sandbox PCH works correctly */ +static int dm_test_pch_base(struct unit_test_state *uts) +{ + struct udevice *dev; + u32 gbase, iobase; + ulong sbase; + + ut_assertok(uclass_first_device_err(UCLASS_PCH, &dev)); + ut_assertok(pch_get_spi_base(dev, &sbase)); + ut_asserteq(0x10, sbase); + + ut_asserteq(0, sandbox_get_pch_spi_protect(dev)); + ut_assertok(pch_set_spi_protect(dev, true)); + ut_asserteq(1, sandbox_get_pch_spi_protect(dev)); + + ut_assertok(pch_get_gpio_base(dev, &gbase)); + ut_asserteq(0x20, gbase); + + ut_assertok(pch_get_io_base(dev, &iobase)); + ut_asserteq(0x30, iobase); + + return 0; +} +DM_TEST(dm_test_pch_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); |