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-rw-r--r--cpu/arm920t/start.S5
-rw-r--r--include/configs/at91rm9200dk.h2
-rw-r--r--include/configs/cmc_pu2.h2
-rw-r--r--include/configs/csb637.h2
-rw-r--r--include/configs/kb9202.h2
-rw-r--r--include/configs/mp2usb.h2
6 files changed, 11 insertions, 4 deletions
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 17977c26b1e..f99d129f85e 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -24,7 +24,6 @@
* MA 02111-1307 USA
*/
-
#include <config.h>
#include <version.h>
#include <status_led.h>
@@ -178,8 +177,6 @@ copyex:
bl cpu_init_crit
#endif
-#ifndef CONFIG_AT91RM9200
-
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
@@ -198,7 +195,7 @@ copy_loop:
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-#endif
+
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 633a0530001..5c239d7bf74 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 527921e8fce..cdd308d8b91 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -71,6 +71,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 38fd25cb668..682db447dd8 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h
index 55cda329ee9..1ce8c6974ad 100644
--- a/include/configs/kb9202.h
+++ b/include/configs/kb9202.h
@@ -51,6 +51,8 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
+ /* NOR flash without preloader */
#define CONFIG_SYS_LONGHELP
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h
index 2ffeae608b3..cbbdb0c77ed 100644
--- a/include/configs/mp2usb.h
+++ b/include/configs/mp2usb.h
@@ -76,6 +76,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*