diff options
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/timer.c | 31 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/timer_defs.h | 4 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/timer.c b/arch/arm/cpu/arm926ejs/davinci/timer.c index 2e7ba4889d1..c7bf7a5ad25 100644 --- a/arch/arm/cpu/arm926ejs/davinci/timer.c +++ b/arch/arm/cpu/arm926ejs/davinci/timer.c @@ -108,3 +108,34 @@ ulong get_tbclk(void) { return CONFIG_SYS_HZ; } + +#ifdef CONFIG_HW_WATCHDOG +static struct davinci_timer * const wdttimer = + (struct davinci_timer *)CONFIG_SYS_WDTTIMERBASE; + +/* + * See prufw2.pdf for using Timer as a WDT + */ +void davinci_hw_watchdog_enable(void) +{ + writel(0x0, &wdttimer->tcr); + writel(0x0, &wdttimer->tgcr); + /* TIMMODE = 2h */ + writel(0x08 | 0x03 | ((TIM_CLK_DIV - 1) << 8), &wdttimer->tgcr); + writel(CONFIG_SYS_WDT_PERIOD_LOW, &wdttimer->prd12); + writel(CONFIG_SYS_WDT_PERIOD_HIGH, &wdttimer->prd34); + writel(2 << 22, &wdttimer->tcr); + writel(0x0, &wdttimer->tim12); + writel(0x0, &wdttimer->tim34); + /* set WDEN bit, WDKEY 0xa5c6 */ + writel(0xa5c64000, &wdttimer->wdtcr); + /* clear counter register */ + writel(0xda7e4000, &wdttimer->wdtcr); +} + +void davinci_hw_watchdog_reset(void) +{ + writel(0xa5c64000, &wdttimer->wdtcr); + writel(0xda7e4000, &wdttimer->wdtcr); +} +#endif diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h index 2a20e49c825..53c961e8da1 100644 --- a/arch/arm/include/asm/arch-davinci/timer_defs.h +++ b/arch/arm/include/asm/arch-davinci/timer_defs.h @@ -37,4 +37,8 @@ struct davinci_timer { u_int32_t wdtcr; }; +#ifdef CONFIG_HW_WATCHDOG +void davinci_hw_watchdog_enable(void); +void davinci_hw_watchdog_reset(void); +#endif #endif /* _TIMER_DEFS_H_ */ |