diff options
| -rw-r--r-- | arch/arm/cpu/armv7/mx6/Kconfig | 5 | ||||
| -rw-r--r-- | board/technexion/pico-imx6ul/Kconfig | 15 | ||||
| -rw-r--r-- | board/technexion/pico-imx6ul/MAINTAINERS | 7 | ||||
| -rw-r--r-- | board/technexion/pico-imx6ul/Makefile | 7 | ||||
| -rw-r--r-- | board/technexion/pico-imx6ul/imximage.cfg | 97 | ||||
| -rw-r--r-- | board/technexion/pico-imx6ul/pico-imx6ul.c | 119 | ||||
| -rw-r--r-- | configs/pico-imx6ul_defconfig | 5 | ||||
| -rw-r--r-- | include/configs/pico-imx6ul.h | 140 |
8 files changed, 395 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig index 1bcd3990933..663f970c4c9 100644 --- a/arch/arm/cpu/armv7/mx6/Kconfig +++ b/arch/arm/cpu/armv7/mx6/Kconfig @@ -136,6 +136,10 @@ config TARGET_OT1200 bool "Bachmann OT1200" select SUPPORT_SPL +config TARGET_PICO_IMX6UL + bool "PICO-IMX6UL-EMMC" + select MX6UL + config TARGET_PLATINUM_PICON bool "platinum-picon" select SUPPORT_SPL @@ -200,6 +204,7 @@ source "board/gateworks/gw_ventana/Kconfig" source "board/kosagi/novena/Kconfig" source "board/seco/Kconfig" source "board/solidrun/mx6cuboxi/Kconfig" +source "board/technexion/pico-imx6ul/Kconfig" source "board/tbs/tbs2910/Kconfig" source "board/tqc/tqma6/Kconfig" source "board/udoo/Kconfig" diff --git a/board/technexion/pico-imx6ul/Kconfig b/board/technexion/pico-imx6ul/Kconfig new file mode 100644 index 00000000000..81acd611f4e --- /dev/null +++ b/board/technexion/pico-imx6ul/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PICO_IMX6UL + +config SYS_BOARD + default "pico-imx6ul" + +config SYS_VENDOR + default "technexion" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "pico-imx6ul" + +endif diff --git a/board/technexion/pico-imx6ul/MAINTAINERS b/board/technexion/pico-imx6ul/MAINTAINERS new file mode 100644 index 00000000000..594a883d152 --- /dev/null +++ b/board/technexion/pico-imx6ul/MAINTAINERS @@ -0,0 +1,7 @@ +Technexion PICO-IMX6UL board +M: Richard Hu <richard.hu@technexion.com> +M: Fabio Estevam <fabio.estevam@nxp.com> +S: Maintained +F: board/technexion/pico-imx6ul/ +F: include/configs/pico-imx6ul.h +F: configs/pico-imx6ul_defconfig diff --git a/board/technexion/pico-imx6ul/Makefile b/board/technexion/pico-imx6ul/Makefile new file mode 100644 index 00000000000..ac8ff9e5482 --- /dev/null +++ b/board/technexion/pico-imx6ul/Makefile @@ -0,0 +1,7 @@ +# (C) Copyright 2015 Technexion Ltd. +# (C) Copyright 2015 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := pico-imx6ul.o diff --git a/board/technexion/pico-imx6ul/imximage.cfg b/board/technexion/pico-imx6ul/imximage.cfg new file mode 100644 index 00000000000..9145b448870 --- /dev/null +++ b/board/technexion/pico-imx6ul/imximage.cfg @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include <config.h> + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi/sd/nand/onenand, qspi/nor + */ +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0xffffffff +DATA 4 0x020c406c 0xffffffff +DATA 4 0x020c4070 0xffffffff +DATA 4 0x020c4074 0xffffffff +DATA 4 0x020c4078 0xffffffff +DATA 4 0x020c407c 0xffffffff +DATA 4 0x020c4080 0xffffffff + +DATA 4 0x020E04B4 0x000C0000 +DATA 4 0x020E04AC 0x00000000 +DATA 4 0x020E027C 0x00000030 +DATA 4 0x020E0250 0x00000030 +DATA 4 0x020E024C 0x00000030 +DATA 4 0x020E0490 0x00000030 +DATA 4 0x020E0288 0x00000030 +DATA 4 0x020E0270 0x00000000 +DATA 4 0x020E0260 0x00000030 +DATA 4 0x020E0264 0x00000030 +DATA 4 0x020E04A0 0x00000030 +DATA 4 0x020E0494 0x00020000 +DATA 4 0x020E0280 0x00000030 +DATA 4 0x020E0284 0x00000030 +DATA 4 0x020E04B0 0x00020000 +DATA 4 0x020E0498 0x00000030 +DATA 4 0x020E04A4 0x00000030 +DATA 4 0x020E0244 0x00000030 +DATA 4 0x020E0248 0x00000030 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B0800 0xA1390003 +DATA 4 0x021B080C 0x00000000 +DATA 4 0x021B083C 0x01380134 +DATA 4 0x021B0848 0x40404244 +DATA 4 0x021B0850 0x40405050 +DATA 4 0x021B081C 0x33333333 +DATA 4 0x021B0820 0x33333333 +DATA 4 0x021B082C 0xf3333333 +DATA 4 0x021B0830 0xf3333333 +DATA 4 0x021B08C0 0x00921012 +DATA 4 0x021B08b8 0x00000800 +DATA 4 0x021B0004 0x0002002D +DATA 4 0x021B0008 0x00333030 +DATA 4 0x021B000C 0x676B52F3 +DATA 4 0x021B0010 0xB66D8B63 +DATA 4 0x021B0014 0x01FF00DB +DATA 4 0x021B0018 0x00201740 +DATA 4 0x021B001C 0x00008000 +DATA 4 0x021B002C 0x000026D2 +DATA 4 0x021B0030 0x006B1023 +DATA 4 0x021B0040 0x00000047 +DATA 4 0x021B0000 0x83180000 +DATA 4 0x021B001C 0x02008032 +DATA 4 0x021B001C 0x00008033 +DATA 4 0x021B001C 0x00048031 +DATA 4 0x021B001C 0x15208030 +DATA 4 0x021B001C 0x04008040 +DATA 4 0x021B0020 0x00000800 +DATA 4 0x021B0818 0x00000227 +DATA 4 0x021B0004 0x0002552D +DATA 4 0x021B0404 0x00011006 +DATA 4 0x021B001C 0x00000000 diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c new file mode 100644 index 00000000000..c038d4326ee --- /dev/null +++ b/board/technexion/pico-imx6ul/pico-imx6ul.c @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2015 Technexion Ltd. + * + * Author: Richard Hu <richard.hu@technexion.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/arch/clock.h> +#include <asm/arch/iomux.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/imx-common/iomux-v3.h> +#include <asm/io.h> +#include <common.h> +#include <fsl_esdhc.h> +#include <linux/sizes.h> +#include <usb.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +static iomux_v3_cfg_t const uart6_pads[] = { + MX6_PAD_CSI_MCLK__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI_PIXCLK__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc1_pads[] = { + MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usb_otg_pad[] = { + MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID | MUX_PAD_CTRL(OTG_ID_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart6_pads, ARRAY_SIZE(uart6_pads)); +} + +static void setup_usb(void) +{ + imx_iomux_v3_setup_multiple_pads(usb_otg_pad, ARRAY_SIZE(usb_otg_pad)); +} + +static struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC1_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + return 0; +} + +int board_usb_phy_mode(int port) +{ + return USB_INIT_DEVICE; +} + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_usb(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: PICO-IMX6UL-EMMC\n"); + + return 0; +} diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig new file mode 100644 index 00000000000..9157faa0666 --- /dev/null +++ b/configs/pico-imx6ul_defconfig @@ -0,0 +1,5 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/technexion/pico-imx6ul/imximage.cfg" +CONFIG_TARGET_PICO_IMX6UL=y +CONFIG_OF_LIBFDT=y diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h new file mode 100644 index 00000000000..3e378155a31 --- /dev/null +++ b/include/configs/pico-imx6ul.h @@ -0,0 +1,140 @@ +/* + * Copyright (C) 2015 Technexion Ltd. + * + * Configuration settings for the Technexion PICO-IMX6UL-EMMC board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __PICO_IMX6UL_CONFIG_H +#define __PICO_IMX6UL_CONFIG_H + + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> +#include "mx6_common.h" +#include <asm/imx-common/gpio.h> + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR + +/* MMC Configs */ +#define CONFIG_FSL_USDHC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_SUPPORT_EMMC_BOOT + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */ + +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET + +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_FUNCTION_MASS_STORAGE +#define CONFIG_USB_GADGET_DOWNLOAD +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "FSL" + +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "FSL" + +#define CONFIG_DEFAULT_FDT_FILE "imx6ul-pico-hobbit.dtb" + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=zImage\0" \ + "console=ttymxc5\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "fdt_addr=0x83000000\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot}\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if run loadfdt; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "if mmc rescan; then " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "else run netboot; fi" + +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_STACKSIZE SZ_128K + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_ENV_OFFSET (8 * SZ_64K) + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define CONFIG_MMCROOT "/dev/mmcblk0p2" + +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_CACHE + +#endif /* __PICO_IMX6UL_CONFIG_H */ |